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authorStefan Reinauer <stepan@openbios.org>2004-04-24 23:10:51 +0000
committerStefan Reinauer <stepan@openbios.org>2004-04-24 23:10:51 +0000
commit234454d900a000e4dfd969dff6e5b95831ed2918 (patch)
tree1036d5b507b70b2900b91377ee6eab834c0522b3 /src/drivers/ati/ragexl
parent2ab88d1179d46e4e5242286b59ee8519fa79bb05 (diff)
downloadcoreboot-234454d900a000e4dfd969dff6e5b95831ed2918.tar.gz
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add missing include files for btext console. add YhLu's fixes to ragexl code
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/drivers/ati/ragexl')
-rw-r--r--src/drivers/ati/ragexl/atyfb.h28
-rw-r--r--src/drivers/ati/ragexl/fb.h339
-rw-r--r--src/drivers/ati/ragexl/fbcon.h176
-rw-r--r--src/drivers/ati/ragexl/mach64_ct.c11
-rw-r--r--src/drivers/ati/ragexl/xlinit.c1035
5 files changed, 1559 insertions, 30 deletions
diff --git a/src/drivers/ati/ragexl/atyfb.h b/src/drivers/ati/ragexl/atyfb.h
index 5383895e52eb..31092e2e1678 100644
--- a/src/drivers/ati/ragexl/atyfb.h
+++ b/src/drivers/ati/ragexl/atyfb.h
@@ -23,7 +23,6 @@
/*
* Elements of the hardware specific atyfb_par structure
*/
-#if 0
struct crtc {
u32 vxres;
u32 vyres;
@@ -39,7 +38,7 @@ struct crtc {
u32 dp_pix_width; /* acceleration */
u32 dp_chain_mask; /* acceleration */
};
-
+#if 0
struct pll_514 {
u8 m;
u8 n;
@@ -83,12 +82,12 @@ union aty_pll {
/*
* The hardware parameters for each card
*/
-#if 0
struct atyfb_par {
struct crtc crtc;
union aty_pll pll;
u32 accel_flags;
};
+#if 0
struct aty_cursor {
int enable;
int on;
@@ -106,23 +105,30 @@ struct aty_cursor {
};
#endif
struct fb_info_aty {
-#if 0
struct fb_info fb_info;
+#if 0
struct fb_info_aty *next;
unsigned long ati_regbase_phys;
#endif
unsigned long ati_regbase;
#if 0
unsigned long frame_buffer_phys;
+#endif
unsigned long frame_buffer;
unsigned long clk_wr_offset;
+#if 0
struct pci_mmap_map *mmap_map;
struct aty_cursor *cursor;
+#endif
struct aty_cmap_regs *aty_cmap_regs;
+#if 0
struct { u8 red, green, blue, pad; } palette[256];
+#endif
struct atyfb_par default_par;
+#if 0
struct atyfb_par current_par;
#endif
+
u32 features;
u32 total_vram;
u32 ref_clk_per;
@@ -131,14 +137,10 @@ struct fb_info_aty {
u32 xclk_per;
u8 bus_type;
u8 ram_type;
-#if 0
u8 mem_refresh_rate;
-#endif
#if 0
struct aty_dac_ops *dac_ops;
struct aty_pll_ops *pll_ops;
-#endif
-#if 0
struct display disp;
struct display_switch dispsw;
#endif
@@ -155,7 +157,9 @@ struct fb_info_aty {
u32 cfb32[16];
#endif
} fbcon_cmap;
+#endif
u8 blitter_may_be_busy;
+#if 0
#ifdef __sparc__
u8 mmaped;
int open;
@@ -354,7 +358,8 @@ extern const struct aty_pll_ops aty_pll_ch8398; /* Chrontel 8398 */
extern const struct aty_pll_ops aty_pll_att20c408; /* AT&T 20C408 */
extern const struct aty_pll_ops aty_pll_ibm514; /* IBM RGB514 */
extern const struct aty_pll_ops aty_pll_unsupported; /* unsupported */
-
+#endif
+#if 0
static struct aty_pll_ops aty_pll_ct; /* Integrated */
static void aty_set_pll_ct(const struct fb_info_aty *info,
@@ -363,7 +368,6 @@ static void aty_set_pll_ct(const struct fb_info_aty *info,
static void aty_calc_pll_ct(const struct fb_info_aty *info,
struct pll_ct *pll);
#endif
-
#if 0
/*
* Hardware cursor support
@@ -373,7 +377,7 @@ extern void atyfb_cursor(struct display *p, int mode, int x, int y);
extern void aty_set_cursor_color(struct fb_info_aty *fb);
extern void aty_set_cursor_shape(struct fb_info_aty *fb);
extern int atyfb_set_font(struct display *d, int width, int height);
-
+#endif
/*
* Hardware acceleration
*/
@@ -390,7 +394,7 @@ static inline void wait_for_idle(struct fb_info_aty *info)
while ((aty_ld_le32(GUI_STAT, info) & 1)!= 0);
info->blitter_may_be_busy = 0;
}
-
+#if 0
extern void aty_reset_engine(const struct fb_info_aty *info);
extern void aty_init_engine(const struct atyfb_par *par,
struct fb_info_aty *info);
diff --git a/src/drivers/ati/ragexl/fb.h b/src/drivers/ati/ragexl/fb.h
new file mode 100644
index 000000000000..cdcbc2596ca3
--- /dev/null
+++ b/src/drivers/ati/ragexl/fb.h
@@ -0,0 +1,339 @@
+#ifndef _LINUX_FB_H
+#define _LINUX_FB_H
+
+#define u32 uint32_t
+#define u16 uint16_t
+#define u8 uint8_t
+#define s16 short
+
+/* Definitions of frame buffers */
+
+#define FB_MAJOR 29
+#define FB_MAX 32 /* sufficient for now */
+
+/* ioctls
+ 0x46 is 'F' */
+#define FBIOGET_VSCREENINFO 0x4600
+#define FBIOPUT_VSCREENINFO 0x4601
+#define FBIOGET_FSCREENINFO 0x4602
+#define FBIOGETCMAP 0x4604
+#define FBIOPUTCMAP 0x4605
+#define FBIOPAN_DISPLAY 0x4606
+/* 0x4607-0x460B are defined below */
+/* #define FBIOGET_MONITORSPEC 0x460C */
+/* #define FBIOPUT_MONITORSPEC 0x460D */
+/* #define FBIOSWITCH_MONIBIT 0x460E */
+#define FBIOGET_CON2FBMAP 0x460F
+#define FBIOPUT_CON2FBMAP 0x4610
+#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */
+#define FBIOGET_VBLANK _IOR('F', 0x12, struct fb_vblank)
+#define FBIO_ALLOC 0x4613
+#define FBIO_FREE 0x4614
+#define FBIOGET_GLYPH 0x4615
+#define FBIOGET_HWCINFO 0x4616
+#define FBIOPUT_MODEINFO 0x4617
+#define FBIOGET_DISPINFO 0x4618
+
+
+#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
+#define FB_TYPE_PLANES 1 /* Non interleaved planes */
+#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */
+#define FB_TYPE_TEXT 3 /* Text/attributes */
+#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */
+
+#define FB_AUX_TEXT_MDA 0 /* Monochrome text */
+#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */
+#define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */
+#define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */
+#define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */
+
+#define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */
+#define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */
+#define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */
+
+#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */
+#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */
+#define FB_VISUAL_TRUECOLOR 2 /* True color */
+#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */
+#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */
+#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */
+
+#define FB_ACCEL_NONE 0 /* no hardware accelerator */
+#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */
+#define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */
+#define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */
+#define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */
+#define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */
+#define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */
+#define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */
+#define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */
+#define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */
+#define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */
+#define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */
+#define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */
+#define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */
+#define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */
+#define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */
+#define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */
+#define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */
+#define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */
+#define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */
+#define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */
+#define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */
+#define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */
+#define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */
+#define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */
+#define FB_ACCEL_SUN_TCX 25 /* Sun tcx */
+#define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */
+#define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */
+#define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */
+#define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */
+#define FB_ACCEL_CT_6555x 30 /* C&T 6555x */
+#define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */
+#define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */
+#define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */
+#define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */
+#define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */
+#define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */
+#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */
+#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */
+#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */
+#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */
+
+#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
+#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
+#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
+#define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */
+#define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */
+#define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */
+#define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */
+#define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */
+#define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */
+
+
+struct fb_fix_screeninfo {
+ char id[16]; /* identification string eg "TT Builtin" */
+ unsigned long smem_start; /* Start of frame buffer mem */
+ /* (physical address) */
+ u32 smem_len; /* Length of frame buffer mem */
+ u32 type; /* see FB_TYPE_* */
+ u32 type_aux; /* Interleave for interleaved Planes */
+ u32 visual; /* see FB_VISUAL_* */
+ u16 xpanstep; /* zero if no hardware panning */
+ u16 ypanstep; /* zero if no hardware panning */
+ u16 ywrapstep; /* zero if no hardware ywrap */
+ u32 line_length; /* length of a line in bytes */
+ unsigned long mmio_start; /* Start of Memory Mapped I/O */
+ /* (physical address) */
+ u32 mmio_len; /* Length of Memory Mapped I/O */
+ u32 accel; /* Type of acceleration available */
+ u16 reserved[3]; /* Reserved for future compatibility */
+};
+
+/* Interpretation of offset for color fields: All offsets are from the right,
+ * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
+ * can use the offset as right argument to <<). A pixel afterwards is a bit
+ * stream and is written to video memory as that unmodified. This implies
+ * big-endian byte order if bits_per_pixel is greater than 8.
+ */
+struct fb_bitfield {
+ u32 offset; /* beginning of bitfield */
+ u32 length; /* length of bitfield */
+ u32 msb_right; /* != 0 : Most significant bit is */
+ /* right */
+};
+
+#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */
+
+#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/
+#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */
+#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */
+#define FB_ACTIVATE_MASK 15
+ /* values */
+#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */
+#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */
+#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */
+
+#define FB_ACCELF_TEXT 1 /* text mode acceleration */
+
+#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */
+#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
+#define FB_SYNC_EXT 4 /* external sync */
+#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
+#define FB_SYNC_BROADCAST 16 /* broadcast video timings */
+ /* vtotal = 144d/288n/576i => PAL */
+ /* vtotal = 121d/242n/484i => NTSC */
+#define FB_SYNC_ON_GREEN 32 /* sync on green */
+
+#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
+#define FB_VMODE_INTERLACED 1 /* interlaced */
+#define FB_VMODE_DOUBLE 2 /* double scan */
+#define FB_VMODE_MASK 255
+
+#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */
+#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */
+#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */
+
+struct fb_var_screeninfo {
+ u32 xres; /* visible resolution */
+ u32 yres;
+ u32 xres_virtual; /* virtual resolution */
+ u32 yres_virtual;
+ u32 xoffset; /* offset from virtual to visible */
+ u32 yoffset; /* resolution */
+
+ u32 bits_per_pixel; /* guess what */
+ u32 grayscale; /* != 0 Graylevels instead of colors */
+
+ struct fb_bitfield red; /* bitfield in fb mem if true color, */
+ struct fb_bitfield green; /* else only length is significant */
+ struct fb_bitfield blue;
+ struct fb_bitfield transp; /* transparency */
+
+ u32 nonstd; /* != 0 Non standard pixel format */
+
+ u32 activate; /* see FB_ACTIVATE_* */
+
+ u32 height; /* height of picture in mm */
+ u32 width; /* width of picture in mm */
+
+ u32 accel_flags; /* acceleration flags (hints) */
+
+ /* Timing: All values in pixclocks, except pixclock (of course) */
+ u32 pixclock; /* pixel clock in ps (pico seconds) */
+ u32 left_margin; /* time from sync to picture */
+ u32 right_margin; /* time from picture to sync */
+ u32 upper_margin; /* time from sync to picture */
+ u32 lower_margin;
+ u32 hsync_len; /* length of horizontal sync */
+ u32 vsync_len; /* length of vertical sync */
+ u32 sync; /* see FB_SYNC_* */
+ u32 vmode; /* see FB_VMODE_* */
+ u32 reserved[6]; /* Reserved for future compatibility */
+};
+
+struct fb_cmap {
+ u32 start; /* First entry */
+ u32 len; /* Number of entries */
+ u16 *red; /* Red values */
+ u16 *green;
+ u16 *blue;
+ u16 *transp; /* transparency, can be NULL */
+};
+
+struct fb_con2fbmap {
+ u32 console;
+ u32 framebuffer;
+};
+
+/* VESA Blanking Levels */
+#define VESA_NO_BLANKING 0
+#define VESA_VSYNC_SUSPEND 1
+#define VESA_HSYNC_SUSPEND 2
+#define VESA_POWERDOWN 3
+
+struct fb_monspecs {
+ u32 hfmin; /* hfreq lower limit (Hz) */
+ u32 hfmax; /* hfreq upper limit (Hz) */
+ u16 vfmin; /* vfreq lower limit (Hz) */
+ u16 vfmax; /* vfreq upper limit (Hz) */
+ unsigned dpms : 1; /* supports DPMS */
+};
+
+#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */
+#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */
+#define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */
+#define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */
+#define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */
+#define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */
+#define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */
+#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
+#define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */
+
+struct fb_vblank {
+ u32 flags; /* FB_VBLANK flags */
+ u32 count; /* counter of retraces since boot */
+ u32 vcount; /* current scanline position */
+ u32 hcount; /* current scandot position */
+ u32 reserved[4]; /* reserved for future compatibility */
+};
+
+
+#if 1
+
+#define FBCMD_GET_CURRENTPAR 0xDEAD0005
+#define FBCMD_SET_CURRENTPAR 0xDEAD8005
+
+#endif
+
+
+
+ /*
+ * Hardware Cursor
+ */
+
+#define FBIOGET_FCURSORINFO 0x4607
+#define FBIOGET_VCURSORINFO 0x4608
+#define FBIOPUT_VCURSORINFO 0x4609
+#define FBIOGET_CURSORSTATE 0x460A
+#define FBIOPUT_CURSORSTATE 0x460B
+
+
+struct fb_fix_cursorinfo {
+ u16 crsr_width; /* width and height of the cursor in */
+ u16 crsr_height; /* pixels (zero if no cursor) */
+ u16 crsr_xsize; /* cursor size in display pixels */
+ u16 crsr_ysize;
+ u16 crsr_color1; /* colormap entry for cursor color1 */
+ u16 crsr_color2; /* colormap entry for cursor color2 */
+};
+
+struct fb_var_cursorinfo {
+ u16 width;
+ u16 height;
+ u16 xspot;
+ u16 yspot;
+ u8 data[1]; /* field with [height][width] */
+};
+
+struct fb_cursorstate {
+ s16 xoffset;
+ s16 yoffset;
+ u16 mode;
+};
+
+
+struct fb_info {
+ char modename[40]; /* default video mode */
+// kdev_t node;
+ int flags;
+ int open; /* Has this been open already ? */
+ struct fb_var_screeninfo var; /* Current var */
+ struct fb_fix_screeninfo fix; /* Current fix */
+ struct fb_monspecs monspecs; /* Current Monitor specs */
+ struct fb_cmap cmap; /* Current cmap */
+// struct fb_ops *fbops;
+ char *screen_base; /* Virtual address */
+ struct display *disp; /* initial display variable */
+// struct vc_data *display_fg; /* Console visible on this display */
+ char fontname[40]; /* default font name */
+#if 0
+ devfs_handle_t devfs_handle; /* Devfs handle for new name */
+ devfs_handle_t devfs_lhandle; /* Devfs handle for compat. symlink */
+ int (*changevar)(int); /* tell console var has changed */
+ int (*switch_con)(int, struct fb_info*);
+ /* tell fb to switch consoles */
+ int (*updatevar)(int, struct fb_info*);
+ /* tell fb to update the vars */
+ void (*blank)(int, struct fb_info*); /* tell fb to (un)blank the screen */
+ /* arg = 0: unblank */
+ /* arg > 0: VESA level (arg-1) */
+#endif
+ void *pseudo_palette; /* Fake palette of 16 colors and
+ the cursor's color for non
+ palette mode */
+ /* From here on everything is device dependent */
+ void *par;
+};
+
+#endif /* _LINUX_FB_H */
diff --git a/src/drivers/ati/ragexl/fbcon.h b/src/drivers/ati/ragexl/fbcon.h
new file mode 100644
index 000000000000..56328323dc37
--- /dev/null
+++ b/src/drivers/ati/ragexl/fbcon.h
@@ -0,0 +1,176 @@
+/*
+ * linux/drivers/video/fbcon.h -- Low level frame buffer based console driver
+ *
+ * Copyright (C) 1997 Geert Uytterhoeven
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _VIDEO_FBCON_H
+#define _VIDEO_FBCON_H
+
+
+
+struct display {
+ /* Filled in by the frame buffer device */
+
+ struct fb_var_screeninfo var; /* variable infos. yoffset and vmode */
+ /* are updated by fbcon.c */
+ struct fb_cmap cmap; /* colormap */
+ char *screen_base; /* pointer to top of virtual screen */
+ /* (virtual address) */
+ int visual;
+ int type; /* see FB_TYPE_* */
+ int type_aux; /* Interleave for interleaved Planes */
+ u16 ypanstep; /* zero if no hardware ypan */
+ u16 ywrapstep; /* zero if no hardware ywrap */
+ u32 line_length; /* length of a line in bytes */
+ u16 can_soft_blank; /* zero if no hardware blanking */
+ u16 inverse; /* != 0 text black on white as default */
+// struct display_switch *dispsw; /* low level operations */
+// void *dispsw_data; /* optional dispsw helper data */
+
+#if 0
+ struct fb_fix_cursorinfo fcrsr;
+ struct fb_var_cursorinfo *vcrsr;
+ struct fb_cursorstate crsrstate;
+#endif
+
+ /* Filled in by the low-level console driver */
+
+ struct vc_data *conp; /* pointer to console data */
+// struct fb_info *fb_info; /* frame buffer for this console */
+ int vrows; /* number of virtual rows */
+ unsigned short cursor_x; /* current cursor position */
+ unsigned short cursor_y;
+ int fgcol; /* text colors */
+ int bgcol;
+ u32 next_line; /* offset to one line below */
+ u32 next_plane; /* offset to next plane */
+ u8 *fontdata; /* Font associated to this display */
+ unsigned short _fontheightlog;
+ unsigned short _fontwidthlog;
+ unsigned short _fontheight;
+ unsigned short _fontwidth;
+ int userfont; /* != 0 if fontdata kmalloc()ed */
+ u16 scrollmode; /* Scroll Method */
+ short yscroll; /* Hardware scrolling */
+ unsigned char fgshift, bgshift;
+ unsigned short charmask; /* 0xff or 0x1ff */
+};
+
+
+#define fontheight(p) ((p)->_fontheight)
+#define fontheightlog(p) ((p)->_fontheightlog)
+
+#ifdef CONFIG_FBCON_FONTWIDTH8_ONLY
+
+/* fontwidth w is supported by dispsw */
+#define FONTWIDTH(w) (1 << ((8) - 1))
+/* fontwidths w1-w2 inclusive are supported by dispsw */
+#define FONTWIDTHRANGE(w1,w2) FONTWIDTH(8)
+
+#define fontwidth(p) (8)
+#define fontwidthlog(p) (0)
+
+#else
+
+/* fontwidth w is supported by dispsw */
+#define FONTWIDTH(w) (1 << ((w) - 1))
+/* fontwidths w1-w2 inclusive are supported by dispsw */
+#define FONTWIDTHRANGE(w1,w2) (FONTWIDTH(w2+1) - FONTWIDTH(w1))
+
+#define fontwidth(p) ((p)->_fontwidth)
+#define fontwidthlog(p) ((p)->_fontwidthlog)
+
+#endif
+
+ /*
+ * Attribute Decoding
+ */
+
+/* Color */
+#define attr_fgcol(p,s) \
+ (((s) >> ((p)->fgshift)) & 0x0f)
+#define attr_bgcol(p,s) \
+ (((s) >> ((p)->bgshift)) & 0x0f)
+#define attr_bgcol_ec(p,conp) \
+ ((conp) ? (((conp)->vc_video_erase_char >> ((p)->bgshift)) & 0x0f) : 0)
+
+/* Monochrome */
+#define attr_bold(p,s) \
+ ((s) & 0x200)
+#define attr_reverse(p,s) \
+ (((s) & 0x800) ^ ((p)->inverse ? 0x800 : 0))
+#define attr_underline(p,s) \
+ ((s) & 0x400)
+#define attr_blink(p,s) \
+ ((s) & 0x8000)
+
+ /*
+ * Scroll Method
+ */
+
+/* Internal flags */
+#define __SCROLL_YPAN 0x001
+#define __SCROLL_YWRAP 0x002
+#define __SCROLL_YMOVE 0x003
+#define __SCROLL_YREDRAW 0x004
+#define __SCROLL_YMASK 0x00f
+#define __SCROLL_YFIXED 0x010
+#define __SCROLL_YNOMOVE 0x020
+#define __SCROLL_YPANREDRAW 0x040
+#define __SCROLL_YNOPARTIAL 0x080
+
+/* Only these should be used by the drivers */
+/* Which one should you use? If you have a fast card and slow bus,
+ then probably just 0 to indicate fbcon should choose between
+ YWRAP/YPAN+MOVE/YMOVE. On the other side, if you have a fast bus
+ and even better if your card can do fonting (1->8/32bit painting),
+ you should consider either SCROLL_YREDRAW (if your card is
+ able to do neither YPAN/YWRAP), or SCROLL_YNOMOVE.
+ The best is to test it with some real life scrolling (usually, not
+ all lines on the screen are filled completely with non-space characters,
+ and REDRAW performs much better on such lines, so don't cat a file
+ with every line covering all screen columns, it would not be the right
+ benchmark).
+ */
+#define SCROLL_YREDRAW (__SCROLL_YFIXED|__SCROLL_YREDRAW)
+#define SCROLL_YNOMOVE (__SCROLL_YNOMOVE|__SCROLL_YPANREDRAW)
+
+/* SCROLL_YNOPARTIAL, used in combination with the above, is for video
+ cards which can not handle using panning to scroll a portion of the
+ screen without excessive flicker. Panning will only be used for
+ whole screens.
+ */
+/* Namespace consistency */
+#define SCROLL_YNOPARTIAL __SCROLL_YNOPARTIAL
+
+
+#if defined(__i386__) || defined(__alpha__) || \
+ defined(__x86_64__) || defined(__hppa__) || \
+ defined(__powerpc64__)
+
+#define fb_readb __raw_readb
+#define fb_readw __raw_readw
+#define fb_readl __raw_readl
+#define fb_writeb __raw_writeb
+#define fb_writew __raw_writew
+#define fb_writel __raw_writel
+#define fb_memset memset_io
+
+#else
+
+#define fb_readb(addr) (*(volatile u8 *) (addr))
+#define fb_readw(addr) (*(volatile u16 *) (addr))
+#define fb_readl(addr) (*(volatile u32 *) (addr))
+#define fb_writeb(b,addr) (*(volatile u8 *) (addr) = (b))
+#define fb_writew(b,addr) (*(volatile u16 *) (addr) = (b))
+#define fb_writel(b,addr) (*(volatile u32 *) (addr) = (b))
+#define fb_memset memset
+
+#endif
+
+#endif /* _VIDEO_FBCON_H */
diff --git a/src/drivers/ati/ragexl/mach64_ct.c b/src/drivers/ati/ragexl/mach64_ct.c
index 4cc4969e8fac..bc1af5ff3a6f 100644
--- a/src/drivers/ati/ragexl/mach64_ct.c
+++ b/src/drivers/ati/ragexl/mach64_ct.c
@@ -1,7 +1,7 @@
#define DEBUG_PLL 0
/* FIXME: remove the FAIL definition */
-#define FAIL(x) do { printk_debug(x); return -EINVAL; } while (0)
+#define FAIL(x) do { printk_spew(x); return -EINVAL; } while (0)
static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
struct pll_ct *pll);
@@ -270,7 +270,7 @@ static void aty_calc_pll_ct(const struct fb_info_aty *info, struct pll_ct *pll)
pll->vclk_post_div = vpostdiv;
}
-static int aty_var_to_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
+int aty_var_to_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
u8 bpp, union aty_pll *pll)
{
int err;
@@ -282,7 +282,7 @@ static int aty_var_to_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
return 0;
}
#if 0
-static u32 aty_pll_ct_to_var(const struct fb_info_aty *info,
+u32 aty_pll_ct_to_var(const struct fb_info_aty *info,
const union aty_pll *pll)
{
u32 ref_clk_per = info->ref_clk_per;
@@ -292,10 +292,10 @@ static u32 aty_pll_ct_to_var(const struct fb_info_aty *info,
return ref_clk_per*pll_ref_div*vclk_post_div/vclk_fb_div/2;
}
-
+#endif
void aty_set_pll_ct(const struct fb_info_aty *info, const union aty_pll *pll)
{
-#ifdef DEBUG
+#if DEBUG_PLL==1
printk_debug("aty_set_pll_ct: about to program:\n"
"refdiv=%d, extcntl=0x%02x, mfbdiv=%d\n"
"spllcntl2=0x%02x, sfbdiv=%d, gencntl=0x%02x\n"
@@ -345,6 +345,7 @@ void aty_set_pll_ct(const struct fb_info_aty *info, const union aty_pll *pll)
aty_st_pll(DLL_CNTL, dll_cntl & ~0x40, info);
}
}
+#if 0
static int dummy(void)
{
return 0;
diff --git a/src/drivers/ati/ragexl/xlinit.c b/src/drivers/ati/ragexl/xlinit.c
index 331fd06bacb2..4ec637a6aab5 100644
--- a/src/drivers/ati/ragexl/xlinit.c
+++ b/src/drivers/ati/ragexl/xlinit.c
@@ -21,9 +21,22 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
+#include "fb.h"
+#include "fbcon.h"
#include "mach64.h"
+
+struct aty_cmap_regs {
+ u8 windex;
+ u8 lut;
+ u8 mask;
+ u8 rindex;
+ u8 cntl;
+};
+
#include "atyfb.h"
+#include <console/btext.h>
+
#include "mach64_ct.c"
#define MPLL_GAIN 0xad
@@ -197,7 +210,6 @@ static int atyfb_xl_init(struct fb_info_aty *info)
* pixclock and bpp values don't matter yet, the vclk
* isn't programmed until later.
*/
-
if ((err = aty_var_to_pll_ct(info, 39726, 8, &pll))) return err;
// if ((err = aty_pll_ct.var_to_pll(info, 39726, 8, &pll))) return err;
@@ -355,6 +367,53 @@ static int atyfb_xl_init(struct fb_info_aty *info)
static char m64n_xl_33[] = "3D RAGE (XL PCI-33MHz)";
static char m64n_xl_66[] = "3D RAGE (XL PCI-66MHz)";
+static void aty_set_crtc(const struct fb_info_aty *info,
+ const struct crtc *crtc);
+static int aty_var_to_crtc(const struct fb_info_aty *info,
+ const struct fb_var_screeninfo *var,
+ struct crtc *crtc);
+#if 0
+static int aty_crtc_to_var(const struct crtc *crtc,
+ struct fb_var_screeninfo *var);
+#endif
+
+static void atyfb_set_par(const struct atyfb_par *par,
+ struct fb_info_aty *info);
+static int atyfb_decode_var(const struct fb_var_screeninfo *var,
+ struct atyfb_par *par,
+ const struct fb_info_aty *info);
+#if 0
+static int atyfb_encode_var(struct fb_var_screeninfo *var,
+ const struct atyfb_par *par,
+ const struct fb_info_aty *info);
+#endif
+
+static void do_install_cmap(int con, struct fb_info *fb);
+
+#if 0
+static u32 default_vram = 0;
+#endif
+
+unsigned char color_table[] = { 0, 4, 2, 6, 1, 5, 3, 7,
+ 8,12,10,14, 9,13,11,15 };
+#if 0
+/* the default colour table, for VGA+ colour systems */
+int default_red[] = {0x00,0xaa,0x00,0xaa,0x00,0xaa,0x00,0xaa,
+ 0x55,0xff,0x55,0xff,0x55,0xff,0x55,0xff};
+int default_grn[] = {0x00,0x00,0xaa,0x55,0x00,0x00,0xaa,0xaa,
+ 0x55,0x55,0xff,0xff,0x55,0x55,0xff,0xff};
+int default_blu[] = {0x00,0x00,0x00,0x00,0xaa,0xaa,0xaa,0xaa,
+ 0x55,0x55,0x55,0x55,0xff,0xff,0xff,0xff};
+#endif
+
+struct fb_var_screeninfo default_var = {
+ /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
+ 640, 480, 640, 480, 0, 0, 8, 0,
+ {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
+ 0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
+ 0, FB_VMODE_NONINTERLACED
+};
+
static struct {
u16 pci_id, chip_type;
u8 rev_mask, rev_val;
@@ -367,28 +426,33 @@ static struct {
/* 3D RAGE XL PCI-33/BGA */
{ 0x4752, 0x4752, 0x00, 0x00, m64n_xl_33, 230, 83, 63, M64F_GT | M64F_INTEGRATED | M64F_RESET_3D | M64F_GTB_DSP | M64F_SDRAM_MAGIC_PLL | M64F_EXTRA_BRIGHT | M64F_XL_DLL | M64F_MFB_TIMES_4 },
};
-#if 0
+#if 1
static void aty_calc_mem_refresh(struct fb_info_aty *info,
u16 id,
int xclk)
{
int i, size;
+#if 0
const int ragepro_tbl[] = {
44, 50, 55, 66, 75, 80, 100
};
+#endif
const int ragexl_tbl[] = {
50, 66, 75, 83, 90, 95, 100, 105,
110, 115, 120, 125, 133, 143, 166
};
const int *refresh_tbl;
-
+#if 0
if (IS_XL(id)) {
+#endif
refresh_tbl = ragexl_tbl;
size = sizeof(ragexl_tbl)/sizeof(int);
+#if 0
} else {
refresh_tbl = ragepro_tbl;
size = sizeof(ragepro_tbl)/sizeof(int);
}
+#endif
for (i=0; i < size; i++) {
if (xclk < refresh_tbl[i])
@@ -401,25 +465,38 @@ static void aty_calc_mem_refresh(struct fb_info_aty *info,
static void ati_ragexl_init(device_t dev) {
u32 chip_id;
u32 i;
- int j, k;
+ int j;
u16 type;
u8 rev;
- const char *chipname = NULL;
+ const char *chipname = NULL, *xtal;
int pll, mclk, xclk;
+#if 0
+ int gtb_memsize, k;
+#endif
struct fb_info_aty *info;
struct fb_info_aty info_t;
struct resource *res;
info = &info_t;
+ struct fb_var_screeninfo var;
+#if 0
+ struct display *disp;
+#endif
+
+#if 0
+ u8 pll_ref_div;
+#endif
+
#define USE_AUX_REG 1
-#if USE_AUX_REG==0
res = &dev->resource[0];
if(res->flags & IORESOURCE_IO) {
res = &dev->resource[1];
}
- info->ati_regbase = res->base+0x7ff000+0xc00;
+ info->frame_buffer = res->base;
+#if USE_AUX_REG==0
+ info->ati_regbase = res->base+0x7ff000+0xc00;
#else
res = &dev->resource[2];
if(res->flags & IORESOURCE_MEM) {
@@ -427,7 +504,9 @@ static void ati_ragexl_init(device_t dev) {
}
#endif
- printk_debug("ati_regbase = 0x%08x\r\n", info->ati_regbase);
+ printk_info("ati_regbase = 0x%08x, frame_buffer = 0x%08x\r\n", info->ati_regbase, info->frame_buffer);
+
+ info->aty_cmap_regs = (struct aty_cmap_regs *)(info->ati_regbase+0xc0);
chip_id = aty_ld_le32(CONFIG_CHIP_ID, info);
type = chip_id & CFG_CHIP_TYPE;
@@ -446,15 +525,15 @@ static void ati_ragexl_init(device_t dev) {
return ;
found:
- printk_debug("ati_ragexl_init: %s [0x%04x rev 0x%02x] ", chipname, type, rev);
-
+ printk_info("ati_ragexl_init: %s [0x%04x rev 0x%02x]\r\n", chipname, type, rev);
+#if 0
if (M64_HAS(INTEGRATED)) {
/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
if (mclk == 67 && info->ram_type < SDRAM)
mclk = 63;
}
-
-// aty_calc_mem_refresh(info, type, xclk);
+#endif
+ aty_calc_mem_refresh(info, type, xclk);
info->pll_per = 1000000/pll;
info->mclk_per = 1000000/mclk;
info->xclk_per = 1000000/xclk;
@@ -464,8 +543,938 @@ found:
info->bus_type = PCI;
- atyfb_xl_init(info);
+ atyfb_xl_init(info);
+
+ info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) & 0x07);
+
+ info->ref_clk_per = 1000000000000ULL/14318180;
+ xtal = "14.31818";
+#if 0
+ if (M64_HAS(GTB_DSP) && (pll_ref_div = aty_ld_pll(PLL_REF_DIV, info))) {
+ int diff1, diff2;
+ diff1 = 510*14/pll_ref_div-pll;
+ diff2 = 510*29/pll_ref_div-pll;
+ if (diff1 < 0)
+ diff1 = -diff1;
+ if (diff2 < 0)
+ diff2 = -diff2;
+ if (diff2 < diff1) {
+ info->ref_clk_per = 1000000000000ULL/29498928;
+ xtal = "29.498928";
+ }
+ }
+#endif
+
+ i = aty_ld_le32(MEM_CNTL, info);
+#if 0
+ gtb_memsize = M64_HAS(GTB_DSP);
+ if (gtb_memsize) // We have
+#endif
+ switch (i & 0xF) { /* 0xF used instead of MEM_SIZE_ALIAS */
+ case MEM_SIZE_512K:
+ info->total_vram = 0x80000;
+ break;
+ case MEM_SIZE_1M:
+ info->total_vram = 0x100000;
+ break;
+ case MEM_SIZE_2M_GTB:
+ info->total_vram = 0x200000;
+ break;
+ case MEM_SIZE_4M_GTB:
+ info->total_vram = 0x400000;
+ break;
+ case MEM_SIZE_6M_GTB:
+ info->total_vram = 0x600000;
+ break;
+ case MEM_SIZE_8M_GTB:
+ info->total_vram = 0x800000;
+ break;
+ default:
+ info->total_vram = 0x80000;
+ }
+#if 0
+ else
+ switch (i & MEM_SIZE_ALIAS) {
+ case MEM_SIZE_512K:
+ info->total_vram = 0x80000;
+ break;
+ case MEM_SIZE_1M:
+ info->total_vram = 0x100000;
+ break;
+ case MEM_SIZE_2M:
+ info->total_vram = 0x200000;
+ break;
+ case MEM_SIZE_4M:
+ info->total_vram = 0x400000;
+ break;
+ case MEM_SIZE_6M:
+ info->total_vram = 0x600000;
+ break;
+ case MEM_SIZE_8M:
+ info->total_vram = 0x800000;
+ break;
+ default:
+ info->total_vram = 0x80000;
+ }
+#endif
+
+ if (M64_HAS(MAGIC_VRAM_SIZE)) {
+ if (aty_ld_le32(CONFIG_STAT1, info) & 0x40000000)
+ info->total_vram += 0x400000;
+ }
+#if 0
+ if (default_vram) {
+ info->total_vram = default_vram*1024;
+ i = i & ~(gtb_memsize ? 0xF : MEM_SIZE_ALIAS);
+ if (info->total_vram <= 0x80000)
+ i |= MEM_SIZE_512K;
+ else if (info->total_vram <= 0x100000)
+ i |= MEM_SIZE_1M;
+ else if (info->total_vram <= 0x200000)
+ i |= gtb_memsize ? MEM_SIZE_2M_GTB : MEM_SIZE_2M;
+ else if (info->total_vram <= 0x400000)
+ i |= gtb_memsize ? MEM_SIZE_4M_GTB : MEM_SIZE_4M;
+ else if (info->total_vram <= 0x600000)
+ i |= gtb_memsize ? MEM_SIZE_6M_GTB : MEM_SIZE_6M;
+ else
+ i |= gtb_memsize ? MEM_SIZE_8M_GTB : MEM_SIZE_8M;
+ aty_st_le32(MEM_CNTL, i, info);
+ }
+#endif
+
+ /* Clear the video memory */
+// fb_memset((void *)info->frame_buffer, 0, info->total_vram);
+#if 0
+ disp = &info->disp;
+
+// strcpy(info->fb_info.modename, atyfb_name);
+ info->fb_info.node = -1;
+// info->fb_info.fbops = &atyfb_ops;
+ info->fb_info.disp = disp;
+// strcpy(info->fb_info.fontname, fontname);
+ info->fb_info.changevar = NULL;
+// info->fb_info.switch_con = &atyfbcon_switch;
+// info->fb_info.updatevar = &atyfbcon_updatevar;
+// info->fb_info.blank = &atyfbcon_blank;
+ info->fb_info.flags = FBINFO_FLAG_DEFAULT;
+#endif
+ var = default_var;
+
+#if 0
+ if (noaccel) // We has noaccel in default
+ var.accel_flags &= ~FB_ACCELF_TEXT;
+ else
+ var.accel_flags |= FB_ACCELF_TEXT;
+#endif
+
+ if (var.yres == var.yres_virtual) {
+ u32 vram = info->total_vram ;
+ var.yres_virtual = ((vram * 8) / var.bits_per_pixel) / var.xres_virtual;
+ if (var.yres_virtual < var.yres)
+ var.yres_virtual = var.yres;
+ }
+
+ if (atyfb_decode_var(&var, &info->default_par, info)) {
+ printk_debug("atyfb: can't set default video mode\n");
+ return ;
+ }
+#if 0
+ for (j = 0; j < 16; j++) {
+ k = color_table[j];
+ info->palette[j].red = default_red[k];
+ info->palette[j].green = default_grn[k];
+ info->palette[j].blue = default_blu[k];
+ }
+#endif
+
+#if 0
+ if (curblink && M64_HAS(INTEGRATED)) {
+ info->cursor = aty_init_cursor(info);
+ if (info->cursor) {
+ info->dispsw.cursor = atyfb_cursor;
+ info->dispsw.set_font = atyfb_set_font;
+ }
+ }
+#endif
+
+#if 0
+ atyfb_set_var(&var, -1, &info->fb_info);
+#else
+ atyfb_set_par(&info->default_par, info);
+ do_install_cmap(-1, &info->fb_info);
+#endif
+
+#if 0
+
+ printk_info("framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
+ (((info->current_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
+ ((info->current_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
+ info->current_par.crtc.bpp,
+ info->current_par.crtc.vxres*info->default_par.crtc.bpp/8
+ );
+ btext_setup_display(
+ (((info->current_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
+ ((info->current_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
+ info->current_par.crtc.bpp,
+ info->current_par.crtc.vxres*info->current_par.crtc.bpp/8,info->frame_buffer);
+#else
+ printk_debug("framebuffer=0x%08x, width=%d, height=%d, bpp=%d, pitch=%d\n",info->frame_buffer,
+ (((info->default_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
+ ((info->default_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
+ info->default_par.crtc.bpp,
+ info->default_par.crtc.vxres*info->default_par.crtc.bpp/8
+ );
+ btext_setup_display(
+ (((info->default_par.crtc.h_tot_disp>>16) & 0xff)+1)*8,
+ ((info->default_par.crtc.v_tot_disp>>16) & 0x7ff)+1,
+ info->default_par.crtc.bpp,
+ info->default_par.crtc.vxres*info->default_par.crtc.bpp/8,info->frame_buffer);
+#endif
+
+ btext_clearscreen();
+
+ map_boot_text();
+
+#if 0
+ btext_drawstring("1\n");
+ btext_drawstring("2\n");
+ btext_drawstring("3\n");
+ btext_drawstring("4\n");
+ btext_drawstring("test framebuffer 5\n");
+ btext_drawstring("test framebuffer 6\n");
+ btext_drawstring("test framebuffer 7\n");
+ btext_drawstring("test framebuffer 8\n");
+ btext_drawstring("test framebuffer 9\n");
+ btext_drawstring("test framebuffer 10\n");
+ btext_drawstring("test framebuffer 11\n");
+ btext_drawstring("test framebuffer 12\n");
+ btext_drawstring("test framebuffer 13\n");
+ btext_drawstring("test framebuffer 14\n");
+ btext_drawstring("test framebuffer 15\n");
+ btext_drawstring("test framebuffer 16\n");
+ btext_drawstring("test framebuffer 17\n");
+ btext_drawstring("test framebuffer 18\n");
+ btext_drawstring("test framebuffer 19\n");
+ btext_drawstring("test framebuffer 20\n");
+ btext_drawstring("test framebuffer 21\n");
+ btext_drawstring("test framebuffer 22\n");
+ btext_drawstring("test framebuffer 23\n");
+ btext_drawstring("test framebuffer 24\n");
+
+ mdelay(10000);
+// test end
+#endif
+
+}
+
+static int atyfb_decode_var(const struct fb_var_screeninfo *var,
+ struct atyfb_par *par,
+ const struct fb_info_aty *info)
+{
+ int err;
+
+ if ((err = aty_var_to_crtc(info, var, &par->crtc)) ||
+ (err = aty_var_to_pll_ct(info, var->pixclock, par->crtc.bpp,
+ &par->pll)))
+ return err;
+
+#if 0
+ if (var->accel_flags & FB_ACCELF_TEXT)
+ par->accel_flags = FB_ACCELF_TEXT;
+ else
+#endif
+ par->accel_flags = 0;
+
+#if 0 /* fbmon is not done. uncomment for 2.5.x -brad */
+ if (!fbmon_valid_timings(var->pixclock, htotal, vtotal, info))
+ return -EINVAL;
+#endif
+
+ return 0;
}
+#if 0
+static int atyfb_encode_var(struct fb_var_screeninfo *var,
+ const struct atyfb_par *par,
+ const struct fb_info_aty *info)
+{
+ int err;
+
+ memset(var, 0, sizeof(struct fb_var_screeninfo));
+
+ if ((err = aty_crtc_to_var(&par->crtc, var)))
+ return err;
+ var->pixclock = aty_pll_ct_to_var(info, &par->pll);
+
+ var->height = -1;
+ var->width = -1;
+ var->accel_flags = par->accel_flags;
+
+ return 0;
+}
+#endif
+static void aty_set_crtc(const struct fb_info_aty *info,
+ const struct crtc *crtc)
+{
+ aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_tot_disp, info);
+ aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid, info);
+ aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_tot_disp, info);
+ aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid, info);
+ aty_st_le32(CRTC_VLINE_CRNT_VLINE, 0, info);
+ aty_st_le32(CRTC_OFF_PITCH, crtc->off_pitch, info);
+ aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl, info);
+}
+
+static int aty_var_to_crtc(const struct fb_info_aty *info,
+ const struct fb_var_screeninfo *var,
+ struct crtc *crtc)
+{
+ u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
+ u32 left, right, upper, lower, hslen, vslen, sync, vmode;
+ u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
+ u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
+ u32 pix_width, dp_pix_width, dp_chain_mask;
+
+ /* input */
+ xres = var->xres;
+ yres = var->yres;
+ vxres = var->xres_virtual;
+ vyres = var->yres_virtual;
+ xoffset = var->xoffset;
+ yoffset = var->yoffset;
+ bpp = var->bits_per_pixel;
+ left = var->left_margin;
+ right = var->right_margin;
+ upper = var->upper_margin;
+ lower = var->lower_margin;
+ hslen = var->hsync_len;
+ vslen = var->vsync_len;
+ sync = var->sync;
+ vmode = var->vmode;
+
+ /* convert (and round up) and validate */
+ xres = (xres+7) & ~7;
+ xoffset = (xoffset+7) & ~7;
+ vxres = (vxres+7) & ~7;
+ if (vxres < xres+xoffset)
+ vxres = xres+xoffset;
+ h_disp = xres/8-1;
+ if (h_disp > 0xff)
+ FAIL("h_disp too large");
+ h_sync_strt = h_disp+(right/8);
+ if (h_sync_strt > 0x1ff)
+ FAIL("h_sync_start too large");
+ h_sync_dly = right & 7;
+ h_sync_wid = (hslen+7)/8;
+ if (h_sync_wid > 0x1f)
+ FAIL("h_sync_wid too large");
+ h_total = h_sync_strt+h_sync_wid+(h_sync_dly+left+7)/8;
+ if (h_total > 0x1ff)
+ FAIL("h_total too large");
+ h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1;
+
+ if (vyres < yres+yoffset)
+ vyres = yres+yoffset;
+ v_disp = yres-1;
+ if (v_disp > 0x7ff)
+ FAIL("v_disp too large");
+ v_sync_strt = v_disp+lower;
+ if (v_sync_strt > 0x7ff)
+ FAIL("v_sync_strt too large");
+ v_sync_wid = vslen;
+ if (v_sync_wid > 0x1f)
+ FAIL("v_sync_wid too large");
+ v_total = v_sync_strt+v_sync_wid+upper;
+ if (v_total > 0x7ff)
+ FAIL("v_total too large");
+ v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1;
+
+ c_sync = sync & FB_SYNC_COMP_HIGH_ACT ? CRTC_CSYNC_EN : 0;
+
+ if (bpp <= 8) {
+ bpp = 8;
+ pix_width = CRTC_PIX_WIDTH_8BPP;
+ dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
+ dp_chain_mask = 0x8080;
+ }
+#if 0
+ else if (bpp <= 16) {
+ bpp = 16;
+ pix_width = CRTC_PIX_WIDTH_15BPP;
+ dp_pix_width = HOST_15BPP | SRC_15BPP | DST_15BPP |
+ BYTE_ORDER_LSB_TO_MSB;
+ dp_chain_mask = 0x4210;
+ } else if (bpp <= 24 && M64_HAS(INTEGRATED)) {
+ bpp = 24;
+ pix_width = CRTC_PIX_WIDTH_24BPP;
+ dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
+ dp_chain_mask = 0x8080;
+ } else if (bpp <= 32) {
+ bpp = 32;
+ pix_width = CRTC_PIX_WIDTH_32BPP;
+ dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
+ BYTE_ORDER_LSB_TO_MSB;
+ dp_chain_mask = 0x8080;
+ }
+#endif
+else
+ FAIL("invalid bpp");
+
+ if (vxres*vyres*bpp/8 > info->total_vram)
+ FAIL("not enough video RAM");
+ if ((vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
+ FAIL("invalid vmode");
+
+ /* output */
+ crtc->vxres = vxres;
+ crtc->vyres = vyres;
+ crtc->xoffset = xoffset;
+ crtc->yoffset = yoffset;
+ crtc->bpp = bpp;
+ crtc->h_tot_disp = h_total | (h_disp<<16);
+ crtc->h_sync_strt_wid = (h_sync_strt & 0xff) | (h_sync_dly<<8) |
+ ((h_sync_strt & 0x100)<<4) | (h_sync_wid<<16) |
+ (h_sync_pol<<21);
+ crtc->v_tot_disp = v_total | (v_disp<<16);
+ crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid<<16) | (v_sync_pol<<21);
+ crtc->off_pitch = ((yoffset*vxres+xoffset)*bpp/64) | (vxres<<19);
+ crtc->gen_cntl = pix_width | c_sync | CRTC_EXT_DISP_EN | CRTC_ENABLE;
+ if (M64_HAS(MAGIC_FIFO)) {
+ /* Not VTB/GTB */
+ /* FIXME: magic FIFO values */
+ crtc->gen_cntl |= aty_ld_le32(CRTC_GEN_CNTL, info) & 0x000e0000;
+ }
+ crtc->dp_pix_width = dp_pix_width;
+ crtc->dp_chain_mask = dp_chain_mask;
+
+ return 0;
+}
+#if 0
+static int aty_crtc_to_var(const struct crtc *crtc,
+ struct fb_var_screeninfo *var)
+{
+ u32 xres, yres, bpp, left, right, upper, lower, hslen, vslen, sync;
+ u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
+ u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
+ u32 pix_width;
+
+ /* input */
+ h_total = crtc->h_tot_disp & 0x1ff;
+ h_disp = (crtc->h_tot_disp>>16) & 0xff;
+ h_sync_strt = (crtc->h_sync_strt_wid & 0xff) |
+ ((crtc->h_sync_strt_wid>>4) & 0x100);
+ h_sync_dly = (crtc->h_sync_strt_wid>>8) & 0x7;
+ h_sync_wid = (crtc->h_sync_strt_wid>>16) & 0x1f;
+ h_sync_pol = (crtc->h_sync_strt_wid>>21) & 0x1;
+ v_total = crtc->v_tot_disp & 0x7ff;
+ v_disp = (crtc->v_tot_disp>>16) & 0x7ff;
+ v_sync_strt = crtc->v_sync_strt_wid & 0x7ff;
+ v_sync_wid = (crtc->v_sync_strt_wid>>16) & 0x1f;
+ v_sync_pol = (crtc->v_sync_strt_wid>>21) & 0x1;
+ c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0;
+ pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK;
+
+ /* convert */
+ xres = (h_disp+1)*8;
+ yres = v_disp+1;
+ left = (h_total-h_sync_strt-h_sync_wid)*8-h_sync_dly;
+ right = (h_sync_strt-h_disp)*8+h_sync_dly;
+ hslen = h_sync_wid*8;
+ upper = v_total-v_sync_strt-v_sync_wid;
+ lower = v_sync_strt-v_disp;
+ vslen = v_sync_wid;
+ sync = (h_sync_pol ? 0 : FB_SYNC_HOR_HIGH_ACT) |
+ (v_sync_pol ? 0 : FB_SYNC_VERT_HIGH_ACT) |
+ (c_sync ? FB_SYNC_COMP_HIGH_ACT : 0);
+
+ switch (pix_width) {
+#if 0
+ case CRTC_PIX_WIDTH_4BPP:
+ bpp = 4;
+ var->red.offset = 0;
+ var->red.length = 8;
+ var->green.offset = 0;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.offset = 0;
+ var->transp.length = 0;
+ break;
+#endif
+ case CRTC_PIX_WIDTH_8BPP:
+ bpp = 8;
+ var->red.offset = 0;
+ var->red.length = 8;
+ var->green.offset = 0;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.offset = 0;
+ var->transp.length = 0;
+ break;
+#if 0
+ case CRTC_PIX_WIDTH_15BPP: /* RGB 555 */
+ bpp = 16;
+ var->red.offset = 10;
+ var->red.length = 5;
+ var->green.offset = 5;
+ var->green.length = 5;
+ var->blue.offset = 0;
+ var->blue.length = 5;
+ var->transp.offset = 0;
+ var->transp.length = 0;
+ break;
+#endif
+#if 0
+ case CRTC_PIX_WIDTH_16BPP: /* RGB 565 */
+ bpp = 16;
+ var->red.offset = 11;
+ var->red.length = 5;
+ var->green.offset = 5;
+ var->green.length = 6;
+ var->blue.offset = 0;
+ var->blue.length = 5;
+ var->transp.offset = 0;
+ var->transp.length = 0;
+ break;
+#endif
+#if 0
+ case CRTC_PIX_WIDTH_24BPP: /* RGB 888 */
+ bpp = 24;
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.offset = 0;
+ var->transp.length = 0;
+ break;
+ case CRTC_PIX_WIDTH_32BPP: /* ARGB 8888 */
+ bpp = 32;
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.offset = 24;
+ var->transp.length = 8;
+ break;
+#endif
+ default:
+ FAIL("Invalid pixel width");
+ }
+
+ /* output */
+ var->xres = xres;
+ var->yres = yres;
+ var->xres_virtual = crtc->vxres;
+ var->yres_virtual = crtc->vyres;
+ var->bits_per_pixel = bpp;
+ var->xoffset = crtc->xoffset;
+ var->yoffset = crtc->yoffset;
+ var->left_margin = left;
+ var->right_margin = right;
+ var->upper_margin = upper;
+ var->lower_margin = lower;
+ var->hsync_len = hslen;
+ var->vsync_len = vslen;
+ var->sync = sync;
+ var->vmode = FB_VMODE_NONINTERLACED;
+
+ return 0;
+}
+#endif
+
+#if 0
+static int encode_fix(struct fb_fix_screeninfo *fix,
+ const struct atyfb_par *par,
+ const struct fb_info_aty *info)
+{
+ memset(fix, 0, sizeof(struct fb_fix_screeninfo));
+
+ // strcpy(fix->id, atyfb_name);
+ memcpy(fix->id, "atyfb", 5);
+ fix->smem_start = info->frame_buffer;
+ fix->smem_len = (u32)info->total_vram;
+
+ /*
+ * Reg Block 0 (CT-compatible block) is at ati_regbase_phys
+ * Reg Block 1 (multimedia extensions) is at ati_regbase_phys-0x400
+ */
+ if (M64_HAS(GX)) {
+ fix->mmio_start = info->ati_regbase;
+ fix->mmio_len = 0x400;
+ fix->accel = FB_ACCEL_ATI_MACH64GX;
+ } else if (M64_HAS(CT)) {
+ fix->mmio_start = info->ati_regbase;
+ fix->mmio_len = 0x400;
+ fix->accel = FB_ACCEL_ATI_MACH64CT;
+ } else if (M64_HAS(VT)) {
+ fix->mmio_start = info->ati_regbase-0x400;
+ fix->mmio_len = 0x800;
+ fix->accel = FB_ACCEL_ATI_MACH64VT;
+ } else /* if (M64_HAS(GT)) */ {
+ fix->mmio_start = info->ati_regbase-0x400;
+ fix->mmio_len = 0x800;
+ fix->accel = FB_ACCEL_ATI_MACH64GT;
+ }
+ fix->type = FB_TYPE_PACKED_PIXELS;
+ fix->type_aux = 0;
+ fix->line_length = par->crtc.vxres*par->crtc.bpp/8;
+ fix->visual = par->crtc.bpp <= 8 ? FB_VISUAL_PSEUDOCOLOR
+ : FB_VISUAL_DIRECTCOLOR;
+ fix->ywrapstep = 0;
+ fix->xpanstep = 8;
+ fix->ypanstep = 1;
+
+ return 0;
+}
+#endif
+ /*
+ * Set the User Defined Part of the Display
+ */
+#if 0
+static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
+ struct fb_info *fb)
+{
+ struct fb_info_aty *info = (struct fb_info_aty *)fb;
+ struct atyfb_par par;
+#if 0
+ struct display *display;
+ int oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel, accel;
+#endif
+ int err;
+ int activate = var->activate;
+
+#if 0
+ if (con >= 0)
+ display = &fb_display[con];
+ else
+#endif
+#if 0
+ display = fb->disp; /* used during initialization */
+#endif
+
+ if ((err = atyfb_decode_var(var, &par, info)))
+ return err;
+
+ atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
+
+#if 0
+ printk_info("atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
+#endif
+
+ if ((activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
+#if 0
+ oldxres = display->var.xres;
+ oldyres = display->var.yres;
+ oldvxres = display->var.xres_virtual;
+ oldvyres = display->var.yres_virtual;
+ oldbpp = display->var.bits_per_pixel;
+ oldaccel = display->var.accel_flags;
+ display->var = *var;
+ accel = var->accel_flags & FB_ACCELF_TEXT;
+ if (oldxres != var->xres || oldyres != var->yres ||
+ oldvxres != var->xres_virtual || oldvyres != var->yres_virtual ||
+ oldbpp != var->bits_per_pixel || oldaccel != var->accel_flags) {
+ struct fb_fix_screeninfo fix;
+
+ encode_fix(&fix, &par, info);
+ display->screen_base = (char *)info->frame_buffer;
+ display->visual = fix.visual;
+ display->type = fix.type;
+ display->type_aux = fix.type_aux;
+ display->ypanstep = fix.ypanstep;
+ display->ywrapstep = fix.ywrapstep;
+ display->line_length = fix.line_length;
+ display->can_soft_blank = 1;
+ display->inverse = 0;
+#if 0
+ if (accel)
+ display->scrollmode = (info->bus_type == PCI) ? SCROLL_YNOMOVE : 0;
+ else
+#endif
+ display->scrollmode = SCROLL_YREDRAW;
+#if 0
+ if (info->fb_info.changevar)
+ (*info->fb_info.changevar)(con);
+#endif
+ }
+#endif
+// if (!info->fb_info.display_fg ||
+// info->fb_info.display_fg->vc_num == con) {
+ atyfb_set_par(&par, info);
+#if 0
+ atyfb_set_dispsw(display, info, par.crtc.bpp, accel);
+#endif
+// }
+#if 0
+ if (oldbpp != var->bits_per_pixel) {
+ if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
+ return err;
+#endif
+ do_install_cmap(con, &info->fb_info);
+#if 0
+ }
+#endif
+ }
+
+ return 0;
+}
+
+#endif
+/* ------------------------------------------------------------------------- */
+
+static void atyfb_set_par(const struct atyfb_par *par,
+ struct fb_info_aty *info)
+{
+ u32 i;
+ int accelmode;
+ u8 tmp;
+
+ accelmode = par->accel_flags; /* hack */
+
+#if 0
+// We only use default_par
+ info->current_par = *par;
+#endif
+
+ if (info->blitter_may_be_busy)
+ wait_for_idle(info);
+ tmp = aty_ld_8(CRTC_GEN_CNTL + 3, info);
+ aty_set_crtc(info, &par->crtc);
+ aty_st_8(CLOCK_CNTL + info->clk_wr_offset, 0, info);
+ /* better call aty_StrobeClock ?? */
+ aty_st_8(CLOCK_CNTL + info->clk_wr_offset, CLOCK_STROBE, info);
+
+ //info->dac_ops->set_dac(info, &par->pll, par->crtc.bpp, accelmode);
+ //info->pll_ops->set_pll(info, &par->pll);
+ aty_set_pll_ct(info, &par->pll);
+
+
+ if (!M64_HAS(INTEGRATED)) {
+ /* Don't forget MEM_CNTL */
+ i = aty_ld_le32(MEM_CNTL, info) & 0xf0ffffff;
+ switch (par->crtc.bpp) {
+ case 8:
+ i |= 0x02000000;
+ break;
+#if 0
+ case 16:
+ i |= 0x03000000;
+ break;
+ case 32:
+ i |= 0x06000000;
+ break;
+#endif
+ }
+ aty_st_le32(MEM_CNTL, i, info);
+ } else {
+ i = aty_ld_le32(MEM_CNTL, info) & 0xf00fffff;
+ if (!M64_HAS(MAGIC_POSTDIV))
+ i |= info->mem_refresh_rate << 20;
+ switch (par->crtc.bpp) {
+ case 8:
+// case 24:
+ i |= 0x00000000;
+ break;
+#if 0
+ case 16:
+ i |= 0x04000000;
+ break;
+ case 32:
+ i |= 0x08000000;
+ break;
+#endif
+ }
+ if (M64_HAS(CT_BUS)) {
+ aty_st_le32(DAC_CNTL, 0x87010184, info);
+ aty_st_le32(BUS_CNTL, 0x680000f9, info);
+ } else if (M64_HAS(VT_BUS)) {
+ aty_st_le32(DAC_CNTL, 0x87010184, info);
+ aty_st_le32(BUS_CNTL, 0x680000f9, info);
+ } else if (M64_HAS(MOBIL_BUS)) {
+ aty_st_le32(DAC_CNTL, 0x80010102, info);
+ aty_st_le32(BUS_CNTL, 0x7b33a040, info);
+ } else {
+ /* GT */
+ aty_st_le32(DAC_CNTL, 0x86010102, info);
+ aty_st_le32(BUS_CNTL, 0x7b23a040, info);
+ aty_st_le32(EXT_MEM_CNTL,
+ aty_ld_le32(EXT_MEM_CNTL, info) | 0x5000001, info);
+ }
+
+ aty_st_le32(MEM_CNTL, i, info);
+ }
+ aty_st_8(DAC_MASK, 0xff, info);
+
+ /* Initialize the graphics engine */
+#if 0
+ if (par->accel_flags & FB_ACCELF_TEXT)
+ aty_init_engine(par, info);
+#endif
+
+
+#if 0
+ btext_update_display(info->frame_buffer_phys,
+ (((par->crtc.h_tot_disp>>16) & 0xff)+1)*8,
+ ((par->crtc.v_tot_disp>>16) & 0x7ff)+1,
+ par->crtc.bpp,
+ par->crtc.vxres*par->crtc.bpp/8);
+#endif
+}
+#if 0
+static u16 red2[] = {
+ 0x0000, 0xaaaa
+};
+static u16 green2[] = {
+ 0x0000, 0xaaaa
+};
+static u16 blue2[] = {
+ 0x0000, 0xaaaa
+};
+
+static u16 red4[] = {
+ 0x0000, 0xaaaa, 0x5555, 0xffff
+};
+static u16 green4[] = {
+ 0x0000, 0xaaaa, 0x5555, 0xffff
+};
+static u16 blue4[] = {
+ 0x0000, 0xaaaa, 0x5555, 0xffff
+};
+
+static u16 red8[] = {
+ 0x0000, 0x0000, 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa
+};
+static u16 green8[] = {
+ 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0x0000, 0x0000, 0x5555, 0xaaaa
+};
+static u16 blue8[] = {
+ 0x0000, 0xaaaa, 0x0000, 0xaaaa, 0x0000, 0xaaaa, 0x0000, 0xaaaa
+};
+#endif
+static u16 red16[] = {
+ 0x0000, 0x0000, 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 0x5555, 0x5555, 0x5555, 0x5555, 0xffff, 0xffff, 0xffff, 0xffff
+};
+static u16 green16[] = {
+ 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0x0000, 0x0000, 0x5555, 0xaaaa,
+ 0x5555, 0x5555, 0xffff, 0xffff, 0x5555, 0x5555, 0xffff, 0xffff
+};
+static u16 blue16[] = {
+ 0x0000, 0xaaaa, 0x0000, 0xaaaa, 0x0000, 0xaaaa, 0x0000, 0xaaaa,
+ 0x5555, 0xffff, 0x5555, 0xffff, 0x5555, 0xffff, 0x5555, 0xffff
+};
+#if 0
+static struct fb_cmap default_2_colors = {
+ 0, 2, red2, green2, blue2, NULL
+};
+static struct fb_cmap default_8_colors = {
+ 0, 8, red8, green8, blue8, NULL
+};
+static struct fb_cmap default_4_colors = {
+ 0, 4, red4, green4, blue4, NULL
+};
+#endif
+static struct fb_cmap default_16_colors = {
+ 0, 16, red16, green16, blue16, NULL
+};
+
+
+
+static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
+ u_int transp, struct fb_info *fb)
+{
+ struct fb_info_aty *info = (struct fb_info_aty *)fb;
+ int i, scale;
+
+ if (regno > 255)
+ return 1;
+ red >>= 8;
+ green >>= 8;
+ blue >>= 8;
+#if 0
+//We don't need to store it
+ info->palette[regno].red = red;
+ info->palette[regno].green = green;
+ info->palette[regno].blue = blue;
+#endif
+ i = aty_ld_8(DAC_CNTL, info) & 0xfc;
+ if (M64_HAS(EXTRA_BRIGHT))
+ i |= 0x2; /*DAC_CNTL|0x2 turns off the extra brightness for gt*/
+ aty_st_8(DAC_CNTL, i, info);
+ aty_st_8(DAC_MASK, 0xff, info);
+#if 0
+ scale = (M64_HAS(INTEGRATED) && info->current_par.crtc.bpp == 16) ? 3 : 0;
+#else
+ scale = (M64_HAS(INTEGRATED) && info->default_par.crtc.bpp == 16) ? 3 : 0;
+#endif
+ writeb(regno << scale, &info->aty_cmap_regs->windex);
+ writeb(red, &info->aty_cmap_regs->lut);
+ writeb(green, &info->aty_cmap_regs->lut);
+ writeb(blue, &info->aty_cmap_regs->lut);
+ return 0;
+}
+
+int fb_set_cmap(struct fb_cmap *cmap, int kspc,
+ int (*setcolreg)(u_int, u_int, u_int, u_int, u_int,
+ struct fb_info *),
+ struct fb_info *fb)
+{
+ int i, start;
+ u16 *red, *green, *blue, *transp;
+ u_int hred, hgreen, hblue, htransp;
+
+ red = cmap->red;
+ green = cmap->green;
+ blue = cmap->blue;
+ transp = cmap->transp;
+ start = cmap->start;
+
+ if (start < 0)
+ return -EINVAL;
+ for (i = 0; i < cmap->len; i++) {
+ hred = *red;
+ hgreen = *green;
+ hblue = *blue;
+ htransp = transp ? *transp : 0;
+ red++;
+ green++;
+ blue++;
+ if (transp)
+ transp++;
+ if (setcolreg(start++, hred, hgreen, hblue, htransp, fb))
+ return 0;
+ }
+ return 0;
+}
+
+struct fb_cmap *fb_default_cmap(int len)
+{
+#if 0
+ if (len <= 2)
+ return &default_2_colors;
+ if (len <= 4)
+ return &default_4_colors;
+ if (len <= 8)
+ return &default_8_colors;
+#endif
+ return &default_16_colors;
+}
+
+static void do_install_cmap(int con, struct fb_info *fb)
+{
+#if 0
+ struct fb_info_aty *info = (struct fb_info_aty *)fb;
+ int size = info->current_par.crtc.bpp == 16 ? 32 : 256;
+#else
+ int size = 256;
+#endif
+ fb_set_cmap(fb_default_cmap(size), 1, atyfb_setcolreg, fb);
+}
+
static struct device_operations ati_ragexl_graph_ops = {
.read_resources = pci_dev_read_resources,