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| author | Werner Zeh <werner.zeh@siemens.com> | 2021-05-31 07:08:17 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-04 12:39:06 +0000 |
| commit | 1e02ad3f5a14c6f6a9c34bf2e3ca0eed8f34af1d (patch) | |
| tree | 4c651b1fb67a5778f53357ee90636fdc7c8357e3 /src/drivers/i2c/designware | |
| parent | fb9aecdf8be64d446012a48f006fcf93041733bb (diff) | |
| download | coreboot-1e02ad3f5a14c6f6a9c34bf2e3ca0eed8f34af1d.tar.gz coreboot-1e02ad3f5a14c6f6a9c34bf2e3ca0eed8f34af1d.tar.bz2 coreboot-1e02ad3f5a14c6f6a9c34bf2e3ca0eed8f34af1d.zip | |
drivers/i2c/designware: Report I2C timings for additional bus speeds
Since the OS provides its own driver for the I2C controller it can
choose to use a bus speed other than the one used at coreboot runtime.
In this case it would be good to provide a way how the needed bus
timings are communicated to the OS, since these are very board-specific
and there is no way that the OS can know them other than read the
appropriate ACPI reported timings.
This patch adds some code to report additional bus speed timings if
there are some defined in the devicetree.
Change-Id: If921e0613864660dc1bb8d7c1b30fb9db8ac655d
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/drivers/i2c/designware')
| -rw-r--r-- | src/drivers/i2c/designware/dw_i2c.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index 2e2d20d78cf1..a6498fb1c3d1 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -803,7 +803,7 @@ void dw_i2c_acpi_fill_ssdt(const struct device *dev) struct dw_i2c_speed_config sgen; int bus; const char *path; - unsigned int speed; + unsigned int speed, i; bus = dw_i2c_soc_dev_to_bus(dev); @@ -826,12 +826,17 @@ void dw_i2c_acpi_fill_ssdt(const struct device *dev) /* Ensure a default speed is available */ speed = (bcfg->speed == 0) ? I2C_SPEED_FAST : bcfg->speed; - /* Report timing values for the OS driver */ + /* Report currently used timing values for the OS driver */ + acpigen_write_scope(path); if (dw_i2c_gen_speed_config(dw_i2c_addr, speed, bcfg, &sgen) >= 0) { - acpigen_write_scope(path); dw_i2c_acpi_write_speed_config(&sgen); - acpigen_pop_len(); } + /* Now check if there are more speed settings available and report them as well. */ + for (i = 0; i < DW_I2C_SPEED_CONFIG_COUNT; i++) { + if (bcfg->speed_config[i].speed && speed != bcfg->speed_config[i].speed) + dw_i2c_acpi_write_speed_config(&bcfg->speed_config[i]); + } + acpigen_write_scope_end(); } static int dw_i2c_dev_transfer(struct device *dev, |