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| author | York Yang <york.yang@intel.com> | 2015-04-23 13:00:20 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-04-24 21:15:41 +0200 |
| commit | c13ad6c6df709fda1d70743a860a406643620b9e (patch) | |
| tree | ab12decf6c4eec46e01a9c098b44cfc63327255c /src/drivers/intel/fsp1_0/fastboot_cache.c | |
| parent | 11004878ce6241f157fa931c2fec60cfbc6b6c71 (diff) | |
| download | coreboot-c13ad6c6df709fda1d70743a860a406643620b9e.tar.gz coreboot-c13ad6c6df709fda1d70743a860a406643620b9e.tar.bz2 coreboot-c13ad6c6df709fda1d70743a860a406643620b9e.zip | |
driver/intel/fsp: Correct the fastboot data (MRC data) printing length
Fastboot data in Intel FSP project is printed by hexdump32() in dword
length. So the data length needs to be divided by 4 when printing it.
Change-Id: I959d538bd6e60282882dd138045cc730b4bd8159
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/9976
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/drivers/intel/fsp1_0/fastboot_cache.c')
| -rwxr-xr-x[-rw-r--r--] | src/drivers/intel/fsp1_0/fastboot_cache.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_0/fastboot_cache.c b/src/drivers/intel/fsp1_0/fastboot_cache.c index bcf39abc7ba5..e8651bbba4e7 100644..100755 --- a/src/drivers/intel/fsp1_0/fastboot_cache.c +++ b/src/drivers/intel/fsp1_0/fastboot_cache.c @@ -230,7 +230,7 @@ void * find_and_set_fastboot_cache(void) } printk(BIOS_DEBUG, "FSP MRC cache present at %x.\n", (u32)mrc_cache); printk(BIOS_SPEW, "Saved MRC data:\n"); - hexdump32(BIOS_SPEW, (void *)mrc_cache->mrc_data, mrc_cache->mrc_data_size); + hexdump32(BIOS_SPEW, (void *)mrc_cache->mrc_data, (mrc_cache->mrc_data_size) / 4); return (void *) mrc_cache->mrc_data; } |