diff options
| author | Frans Hendriks <fhendriks@eltan.com> | 2019-11-08 13:55:45 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-14 11:33:46 +0000 |
| commit | 50b999feb842ed116aeaa885d361da776d267ad6 (patch) | |
| tree | aab6342f567cf6a66c2fc4550a3fe15cc7dfd8a3 /src/drivers/intel/fsp1_1/ramstage.c | |
| parent | 348002c3055de539377b8223e5a9af0a1ac8c92e (diff) | |
| download | coreboot-50b999feb842ed116aeaa885d361da776d267ad6.tar.gz coreboot-50b999feb842ed116aeaa885d361da776d267ad6.tar.bz2 coreboot-50b999feb842ed116aeaa885d361da776d267ad6.zip | |
{drivers,mainboard}: Move FSP logo support to fsp1_1
Support to display a logo using FSP 1.1 currently resides in facebook fbg1701
mainboard.
The related support is moved to drivers/intel/fsp1_1 and used by the
Facebook fbg1701 mainboard. The storage for the uncompressed logo
is changed. We don't use .bss any longer as the logo doesn't need to be
available at runtime.
BUG=N/A
TEST=booting Facebook fbg1701
Change-Id: I276e6e14fc87d0b95fe5fdf7b617afd26769de79
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1/ramstage.c')
| -rw-r--r-- | src/drivers/intel/fsp1_1/ramstage.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c index d278d08ed222..70bedc50af45 100644 --- a/src/drivers/intel/fsp1_1/ramstage.c +++ b/src/drivers/intel/fsp1_1/ramstage.c @@ -21,6 +21,7 @@ #include <stage_cache.h> #include <string.h> #include <timestamp.h> +#include <cbmem.h> /* SOC initialization after FSP silicon init */ __weak void soc_after_silicon_init(void) @@ -68,6 +69,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup) EFI_STATUS status; UPD_DATA_REGION *upd_ptr; VPD_DATA_REGION *vpd_ptr; + const struct cbmem_entry *logo_entry; /* Display the FSP header */ if (fsp_info_header == NULL) { @@ -94,6 +96,14 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup) load_vbt(is_s3_wakeup, &silicon_init_params); mainboard_silicon_init_params(&silicon_init_params); + if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) { + silicon_init_params.PcdLogoSize = 1 * MiB; + logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO, + silicon_init_params.PcdLogoSize); + silicon_init_params.PcdLogoPtr = (UINT32)cbmem_entry_start(logo_entry); + load_logo(&silicon_init_params); + } + /* Display the UPD data */ if (CONFIG(DISPLAY_UPD_DATA)) soc_display_silicon_init_params(original_params, @@ -111,6 +121,10 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup) timestamp_add_now(TS_FSP_SILICON_INIT_END); printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); + /* The logo_entry can be freed up now as it is not required any longer */ + if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) + cbmem_entry_remove(logo_entry); + /* Mark graphics init done after SiliconInit if VBT was provided */ #if CONFIG(RUN_FSP_GOP) /* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs |