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authorJonathan Zhang <jonzhang@fb.com>2020-09-14 16:27:13 -0700
committerAngel Pons <th3fanbus@gmail.com>2020-10-02 11:43:23 +0000
commitce0e2a014009390c4527e064efb59260ef4d3a3b (patch)
treef9f398398f6c61b64590803a27175971da0d2def /src/drivers/intel/fsp2_0/cbmem.c
parenta5f4781d81a1d8aadaa527bc287ba2b8b17024b5 (diff)
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drivers/intel/fsp2_0: use FSP to allocate APEI BERT memory region
APEI (ACPI Platform Error Interface) defines BERT (Boot Error Record Table) memory region: * Bootloader (firmware) generates UEFI CPER (Common Platform Error Record) records, and populates BERT region. * OS parses ACPI BERT table, finds the BERT region address, inteprets the data and processes it accordingly. When CONFIG_ACPI_BERT is defined, update FSP UPD BootLoaderTolumSize, so FSP allocates memory region for it. The APEI BERT region is placed on top of CBMEM, for the size of CONFIG_ACPI_BERT_SIZE. Apart from APEI BERT region, we also have plan to add APEI HEST region which holds OS runtime hardware error record, based on firmware first hardware error handling model. HEST region will be reserved same way as BERT region. Note that CBMEM region can not be used for such purpose, the OS (bert/hest) drivers are not able to access data held in CBMEM region, as CBMEM is set as type 16 (configuration table). An option considered was to reserve the BERT region under CBMEM. However, we do not know the size of CBMEM till acpi tables are set up. On the other hand, BERT region needs to be filled up before ACPI BERT table is finalized. Change-Id: Ie72240e4c5fa01fcf937d33678c40f9ca826487a Signed-off-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45391 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/drivers/intel/fsp2_0/cbmem.c')
-rw-r--r--src/drivers/intel/fsp2_0/cbmem.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/cbmem.c b/src/drivers/intel/fsp2_0/cbmem.c
index 0efb462b402e..5388b8912a94 100644
--- a/src/drivers/intel/fsp2_0/cbmem.c
+++ b/src/drivers/intel/fsp2_0/cbmem.c
@@ -6,7 +6,14 @@
void *cbmem_top_chipset(void)
{
struct range_entry tolum;
+ uint8_t *tolum_base;
fsp_find_bootloader_tolum(&tolum);
- return (void *)(uintptr_t)range_entry_end(&tolum);
+ tolum_base = (uint8_t *)(uintptr_t)range_entry_base(&tolum);
+
+ /*
+ * The TOLUM range may have other memory regions (such as APEI
+ * BERT region on top of CBMEM (IMD root and IMD small) region.
+ */
+ return tolum_base + cbmem_overhead_size();
}