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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-21 09:48:49 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-08-03 06:14:39 +0200 |
| commit | e6f2f74b2977fd57f1133fdad182bb718e8b8ddc (patch) | |
| tree | ee0b34e1c5debcf6f05f14b890491dbb106e395f /src/drivers/intel/fsp2_0/debug.c | |
| parent | 0a38b227c802abbc0dbe966860d6e3521d5475ba (diff) | |
| download | coreboot-e6f2f74b2977fd57f1133fdad182bb718e8b8ddc.tar.gz coreboot-e6f2f74b2977fd57f1133fdad182bb718e8b8ddc.tar.bz2 coreboot-e6f2f74b2977fd57f1133fdad182bb718e8b8ddc.zip | |
drivers/intel/fsp2_0: Add UPD display support
Add UPD display support:
* Add a Kconfig value to enable UPD value display
* Add a routine to display a UPD value
* Add a call before MemoryInit to display the UPD parameters
* Add a routine to display the architectural parameters for MemoryInit
* Add a weak routine to display the other UPD parameters for MemoryInit
* Add a call before SiliconInit to display the UPD parameters
* Add a weak routine to display the UPD parameters for SiliconInit
TEST=Build and run on Galileo Gen2.
Change-Id: I35fb8410c0bccf217b32af4b8bbe5ad6671f81f6
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15847
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0/debug.c')
| -rw-r--r-- | src/drivers/intel/fsp2_0/debug.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c index 69982954fcbc..b34910b6fe90 100644 --- a/src/drivers/intel/fsp2_0/debug.c +++ b/src/drivers/intel/fsp2_0/debug.c @@ -25,6 +25,10 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init, if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) soc_display_mtrrs(); + /* Display the UPD values */ + if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA)) + fspm_display_upd_values(fspm_old_upd, fspm_new_upd); + /* Display the call entry point and paramters */ if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS)) return; @@ -56,6 +60,10 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init, if (IS_ENABLED(CONFIG_DISPLAY_MTRRS)) soc_display_mtrrs(); + /* Display the UPD values */ + if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA)) + soc_display_fsps_upd_params(fsps_old_upd, fsps_new_upd); + /* Display the call to FSP SiliconInit */ if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS)) return; |