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author | Aaron Durbin <adurbin@chromium.org> | 2016-07-17 23:23:59 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-19 20:16:11 +0200 |
commit | d04639b3d62dbd6a5fc7f48493411b9e74f990d1 (patch) | |
tree | 0c68322d752eaf0d65cd03dc0ec54c1bc2a45a8d /src/drivers/intel/fsp2_0/include/fsp/api.h | |
parent | a413e5e455136e6511fd9e5541ff4709d279f7a4 (diff) | |
download | coreboot-d04639b3d62dbd6a5fc7f48493411b9e74f990d1.tar.gz coreboot-d04639b3d62dbd6a5fc7f48493411b9e74f990d1.tar.bz2 coreboot-d04639b3d62dbd6a5fc7f48493411b9e74f990d1.zip |
drivers/intel/fsp2_0: handle XIP and non-XIP for FSPM component
The previously implementation for loading the FSPM component didn't
handle platforms which expects FSPM to be XIP. For the non-XIP case,
romstage's address space wasn't fully being checked for overlaps.
Lastly, fixup the API as the range_entry isn't needed any longer.
This API change requires a apollolake to be updated as well.
BUG=chrome-os-partner:52679
Change-Id: I24d0c7d123d12f15a8477e1025bf0901e2d702e7
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15741
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/intel/fsp2_0/include/fsp/api.h')
-rw-r--r-- | src/drivers/intel/fsp2_0/include/fsp/api.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index 9f8aae7f805a..510163d77d75 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -58,7 +58,7 @@ enum fsp_notify_phase { /* Main FSP stages */ -enum fsp_status fsp_memory_init(struct range_entry *r, bool s3wake); +enum fsp_status fsp_memory_init(bool s3wake); enum fsp_status fsp_silicon_init(struct range_entry *r); enum fsp_status fsp_notify(enum fsp_notify_phase phase); @@ -74,14 +74,13 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *supd); * points and map 1:1 to the FSP entry points of the same name. * * ### fsp_memory_init(): - * - r: memory range that the binary is allowed to be loaded into * - s3wake: boolean indicating if the system is waking from resume * * This function is responsible for loading and executing the memory * initialization code from the FSP-M binary. It expects this binary to reside * in cbfs as FSP_M_FILE. * - * The function takes two parameters, which are described above, but does not + * The function takes one parameter, which is described above, but does not * take in memory parameters as an argument. The memory parameters can be filled * in with platform_fsp_memory_init_params_cb(). This is a callback symbol * that fsp_memory_init() will call. The platform must provide this symbol. |