{drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoC

FSP logo handling used FspsConfig.LogoPtr and FspsConfig.LogoSize which
are chipset specific.

Create soc_load_logo() which will pass the logo pointer and size.
This function will call fsp_load_logo which will load the logo.

BUG=NA
TEST= Build and verified logo is displayed on Facebook Monolith

Change-Id: I30c7bdc0532ff8823e06f4136f210b542385d5ce
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37792
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 3 insertions, 1 deletions

diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index fb42c7647ba3..60adb985138d 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -70,13 +70,15 @@ uint8_t fsp_memory_mainboard_version(void);
 uint8_t fsp_memory_soc_version(void);
 
 /* Load logo to be displayed by FSP */
-void load_logo(FSPS_UPD *supd);
+const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size);
 
 /* Callback after processing FSP notify */
 void platform_fsp_notify_status(enum fsp_notify_phase phase);
 
 /* Initialize memory margin analysis settings. */
 void setup_mma(FSP_M_CONFIG *memory_cfg);
+/* Update the SOC specific logo param and load the logo. */
+const struct cbmem_entry *soc_load_logo(FSPS_UPD *supd);
 /* Update the SOC specific memory config param for mma. */
 void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg,
 	struct mma_config_param *mma_cfg);