arch to drivers/intel: Fix misspellings & capitalization issues

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic52f01d1d5d86334e0fd639b968b5eed43a35f1d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77633
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

13 files changed, 20 insertions, 20 deletions

diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c
index fb7cb85e7501..f616d759e830 100644
--- a/src/drivers/intel/dptf/dptf.c
+++ b/src/drivers/intel/dptf/dptf.c
@@ -537,7 +537,7 @@ static void write_device_definitions(const struct device *dev)
 	acpigen_pop_len(); /* Scope */
 }
 
-/* Emites policy definitions for each policy type */
+/* Emits policy definitions for each policy type */
 static void write_policies(const struct drivers_intel_dptf_config *config)
 {
 	dptf_write_enabled_policies(config->policies.active, DPTF_MAX_ACTIVE_POLICIES,
diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h
index 2f927607c2fd..69d7cf6ce224 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/util.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/util.h
@@ -29,7 +29,7 @@ void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old,
 	uint64_t new);
 void report_fsp_output(void);
 
-/* Return version of FSP associated with fih. */
+/* Return version of FSP associated with FIH. */
 static inline uint32_t fsp_version(FSP_INFO_HEADER *fih)
 {
 	return fih->ImageRevision;
diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c
index dd35b0f228b7..894f9ccc246d 100644
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ b/src/drivers/intel/fsp1_1/raminit.c
@@ -239,7 +239,7 @@ void raminit(struct romstage_params *params)
 	mrc_hob = get_guid_hob(&mrc_guid, hob_list_ptr);
 	if (mrc_hob == NULL) {
 		printk(BIOS_DEBUG,
-			"Memory Configuration Data Hob not present\n");
+			"Memory Configuration Data HOB not present\n");
 	} else {
 		params->data_to_save = GET_GUID_HOB_DATA(mrc_hob);
 		params->data_to_save_size = ALIGN_UP(
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index dc890642a257..b3137111ffe0 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -85,7 +85,7 @@ static void raminit_common(struct romstage_params *params)
 	if (!s3wake)
 		mainboard_save_dimm_info(params);
 
-	/* Create romstage handof information */
+	/* Create romstage handoff information */
 	if (romstage_handoff_init(
 			params->power_state->prev_sleep_state == ACPI_S3) < 0)
 		/* FIXME: A "system" reset is likely enough: */
diff --git a/src/drivers/intel/fsp2_0/fsp_gop_blt.c b/src/drivers/intel/fsp2_0/fsp_gop_blt.c
index a5d55c1d8598..5ccec593f575 100644
--- a/src/drivers/intel/fsp2_0/fsp_gop_blt.c
+++ b/src/drivers/intel/fsp2_0/fsp_gop_blt.c
@@ -207,7 +207,7 @@ static void *fill_blt_buffer(efi_bmp_image_header *header,
 				gop_blt->Red   = *bmp_image;
 				break;
 
-			/* Conver 32 bit to 24bit bmp - just ignore the final byte of each pixel */
+			/* Convert 32 bit to 24bit bmp - just ignore the final byte of each pixel */
 			case 32:
 				gop_blt->Blue  = *bmp_image++;
 				gop_blt->Green = *bmp_image++;
diff --git a/src/drivers/intel/fsp2_0/fsp_timestamp.c b/src/drivers/intel/fsp2_0/fsp_timestamp.c
index c3ad3312181f..4e50f8547edd 100644
--- a/src/drivers/intel/fsp2_0/fsp_timestamp.c
+++ b/src/drivers/intel/fsp2_0/fsp_timestamp.c
@@ -32,7 +32,7 @@ struct generic_event_record {
 } __packed;
 
 /*
- * Performance Hob:
+ * Performance HOB:
  *   GUID - fpdt_guid;
  *   Data - FPDT_PEI_EXT_PERF_HEADER one or more FPDT records
 */
diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c
index 0e6a39f0ee7e..5339065b1a0e 100644
--- a/src/drivers/intel/fsp2_0/hand_off_block.c
+++ b/src/drivers/intel/fsp2_0/hand_off_block.c
@@ -107,10 +107,10 @@ static void save_hob_list(int is_recovery)
 	const void *hob_list;
 	cbmem_loc = cbmem_add(CBMEM_ID_FSP_RUNTIME, sizeof(*cbmem_loc));
 	if (cbmem_loc == NULL)
-		die("Error: Could not add cbmem area for hob list.\n");
+		die("Error: Could not add cbmem area for HOB list.\n");
 	hob_list = fsp_get_hob_list();
 	if (!hob_list)
-		die("Error: Could not locate hob list pointer.\n");
+		die("Error: Could not locate HOB list pointer.\n");
 	*cbmem_loc = (uintptr_t)hob_list;
 }
 
diff --git a/src/drivers/intel/fsp2_0/hob_display.c b/src/drivers/intel/fsp2_0/hob_display.c
index 93406636fede..b86b79b13807 100644
--- a/src/drivers/intel/fsp2_0/hob_display.c
+++ b/src/drivers/intel/fsp2_0/hob_display.c
@@ -123,7 +123,7 @@ const char *fsp_get_hob_type_name(const struct hob_header *hob)
 		if (hob->type == hob_type_names[index].type)
 			return hob_type_names[index].name;
 
-	/* Get name for SOC specific hob */
+	/* Get name for SOC specific HOB */
 	name = soc_get_hob_type_name(hob);
 	if (name != NULL)
 		return name;
@@ -162,7 +162,7 @@ void fsp_print_guid_extension_hob(const struct hob_header *hob)
 	fsp_print_guid(BIOS_SPEW, res->owner_guid);
 	printk(BIOS_SPEW, ": %s\n", fsp_get_guid_name(res->owner_guid));
 
-	/* Some of the SoC FSP specific hobs are of type HOB_TYPE_GUID_EXTENSION */
+	/* Some of the SoC FSP specific HOBs are of type HOB_TYPE_GUID_EXTENSION */
 	soc_display_hob(hob);
 }
 
diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h
index 8fdd178d7978..75b9ad844edc 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/util.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/util.h
@@ -123,7 +123,7 @@ enum cb_err fsp_hob_iterator_get_next_guid_extension(const struct hob_header **h
 						     const uint8_t guid[16],
 						     const void **data, size_t *size);
 
-/* Function to extract the FSP timestamp from FPDT Hob and display */
+/* Function to extract the FSP timestamp from FPDT HOB and display */
 void fsp_display_timestamp(void);
 const void *fsp_get_hob_list(void);
 void *fsp_get_hob_list_ptr(void);
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 4706dce8139e..c5920867f348 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -80,7 +80,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t version)
 			save_memory_training_data();
 	}
 
-	/* Create romstage handof information */
+	/* Create romstage handoff information */
 	romstage_handoff_init(s3wake);
 }
 
diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h
index 377f903292ac..8a7ccf77fdfd 100644
--- a/src/drivers/intel/gma/i915_reg.h
+++ b/src/drivers/intel/gma/i915_reg.h
@@ -15,7 +15,7 @@
  * The Bridge device's PCI config space has information about the
  * fb aperture size and the amount of pre-reserved memory.
  * This is all handled in the intel-gtt.ko module. i915.ko only
- * cares about the vga bit for the vga rbiter.
+ * cares about the vga bit for the vga arbiter.
  */
 #define INTEL_GMCH_CTRL		0x52
 #define INTEL_GMCH_VGA_DISABLE  (1 << 1)
@@ -1384,7 +1384,7 @@
 #define   SDVOC_GANG_MODE		(1 << 16)
 #define   SDVO_ENCODING_SDVO		(0x0 << 10)
 #define   SDVO_ENCODING_HDMI		(0x2 << 10)
-/** Requird for HDMI operation */
+/** Required for HDMI operation */
 #define   SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9)
 #define   SDVO_COLOR_RANGE_16_235	(1 << 8)
 #define   SDVO_BORDER_ENABLE		(1 << 7)
@@ -1485,7 +1485,7 @@
 
 /* Video Data Island Packet control */
 #define VIDEO_DIP_DATA		0x61178
-/* Read the description of VIDEO_DIP_DATA (before Haswel) or VIDEO_DIP_ECC
+/* Read the description of VIDEO_DIP_DATA (before Haswell) or VIDEO_DIP_ECC
  * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte
  * of the infoframe structure specified by CEA-861. */
 #define   VIDEO_DIP_DATA_SIZE	32
@@ -1630,7 +1630,7 @@
 #define BLC_HIST_CTL		0x61260
 
 /* New registers for PCH-split platforms. Safe where new bits show up, the
- * register layout machtes with gen4 BLC_PWM_CTL[12]. */
+ * register layout matches with gen4 BLC_PWM_CTL[12]. */
 #define BLC_PWM_CPU_CTL2	0x48250
 #define  BLC_PWM2_ENABLE        (1UL<<31)
 #define BLC_PWM_CPU_CTL		0x48254
@@ -2037,7 +2037,7 @@
 /** Sets the rollover for the second subcarrier phase generation DDA */
 # define TV_SCDDA2_SIZE_MASK		0x7fff0000
 # define TV_SCDDA2_SIZE_SHIFT		16
-/** Sets the increent of the second subcarrier phase generation DDA */
+/** Sets the increment of the second subcarrier phase generation DDA */
 # define TV_SCDDA2_INC_MASK		0x00007fff
 # define TV_SCDDA2_INC_SHIFT		0
 
@@ -2045,7 +2045,7 @@
 /** Sets the rollover for the third subcarrier phase generation DDA */
 # define TV_SCDDA3_SIZE_MASK		0x7fff0000
 # define TV_SCDDA3_SIZE_SHIFT		16
-/** Sets the increent of the third subcarrier phase generation DDA */
+/** Sets the increment of the third subcarrier phase generation DDA */
 # define TV_SCDDA3_INC_MASK		0x00007fff
 # define TV_SCDDA3_INC_SHIFT		0
 
diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h
index 1dd177c2db66..7b6a85db527f 100644
--- a/src/drivers/intel/gma/opregion.h
+++ b/src/drivers/intel/gma/opregion.h
@@ -127,7 +127,7 @@ typedef struct {
 	u32	aslc;		/* Offset 4   ASLE interrupt command / status */
 	u32	tche;		/* Offset 8   Technology enabled indicator */
 	u32	alsi;		/* Offset 12  Current ALS illuminance reading */
-	u32	bclp;		/* Offset 16  Backlight britness to set */
+	u32	bclp;		/* Offset 16  Backlight brightness to set */
 	u32	pfit;		/* Offset 20  Panel fitting Request */
 	u32	cblv;		/* Offset 24  Brightness Current State */
 	u16	bclm[20];	/* Offset 28  Backlight Brightness Level Duty
diff --git a/src/drivers/intel/mipi_camera/chip.h b/src/drivers/intel/mipi_camera/chip.h
index 9d8291e4d53c..ecf371458b6d 100644
--- a/src/drivers/intel/mipi_camera/chip.h
+++ b/src/drivers/intel/mipi_camera/chip.h
@@ -112,7 +112,7 @@ struct resource_config {
 struct clk_config {
 	/* IMGCLKOUT_x being used for a port */
 	uint8_t clknum;
-	/* frequency setting: 0:24Mhz, 1:19.2 Mhz */
+	/* frequency setting: 0:24MHz, 1:19.2 MHz */
 	uint8_t freq;
 };