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| author | Furquan Shaikh <furquan@google.com> | 2020-11-25 17:15:09 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-12-08 22:56:09 +0000 |
| commit | 493937e1d67e734c2ac45f92280f2c2c22a50b85 (patch) | |
| tree | 16b77de5c971be7774935c8c98846bcead32c663 /src/drivers/spi | |
| parent | b53280ab53e19746be04b67f73f9ce230038b1ee (diff) | |
| download | coreboot-493937e1d67e734c2ac45f92280f2c2c22a50b85.tar.gz coreboot-493937e1d67e734c2ac45f92280f2c2c22a50b85.tar.bz2 coreboot-493937e1d67e734c2ac45f92280f2c2c22a50b85.zip | |
coreboot tables: Add SPI flash memory map windows to coreboot tables
This change adds details about the memory map windows to translate
addresses between SPI flash space and host address space to coreboot
tables. This is useful for payloads to setup the translation using the
decode windows already known to coreboot. Until now, there was a
single decode window at the top of 4G used by all x86
platforms. However, going forward, platforms might support more decode
windows and hence in order to avoid duplication in payloads this
information is filled in coreboot tables.
`lb_spi_flash()` is updated to fill in the details about these windows
by making a call to `spi_flash_get_mmap_windows()` which is
implemented by the driver providing the boot media mapping device.
BUG=b:171534504
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/spi')
| -rw-r--r-- | src/drivers/spi/spi_flash.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index f2610a181d17..2406a90e52e7 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -663,6 +663,14 @@ void lb_spi_flash(struct lb_header *header) flash->sector_size = 64 * KiB; flash->erase_cmd = CMD_BLOCK_ERASE; } + + if (!CONFIG(BOOT_DEVICE_MEMORY_MAPPED)) { + flash->mmap_count = 0; + } else { + struct flash_mmap_window *table = (struct flash_mmap_window *)(flash + 1); + flash->mmap_count = spi_flash_get_mmap_windows(table); + flash->size += flash->mmap_count * sizeof(*table); + } } int spi_flash_ctrlr_protect_region(const struct spi_flash *flash, |