diff options
| author | Tim Chu <Tim.Chu@quantatw.com> | 2020-11-12 02:56:59 -0800 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-20 00:51:03 +0000 |
| commit | 957a36397ad7edc004f1f432a26ed43f86480bbf (patch) | |
| tree | 294d80c2823fbc454f4b8923b70a63efa44ad128 /src/drivers | |
| parent | 051ee4e3ad14861b64ddb1da5af473812770279a (diff) | |
| download | coreboot-957a36397ad7edc004f1f432a26ed43f86480bbf.tar.gz coreboot-957a36397ad7edc004f1f432a26ed43f86480bbf.tar.bz2 coreboot-957a36397ad7edc004f1f432a26ed43f86480bbf.zip | |
vc/intel/fsp/fsp2_0/cpx_sp: Expose RasModesEnabled field in
SystemMemoryMapHob
This field from SystemMemoryMapHob can be used to define error
correction type in SMBIOS type 16.
Tested=On OCP Delta Lake, the value is expected.
Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I0009a287a64f16e926f682e389af3248aeb85bdf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47505
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
0 files changed, 0 insertions, 0 deletions