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| author | Derek Huang <derek.huang@intel.corp-partner.google.com> | 2021-09-29 16:39:01 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-10-06 22:17:05 +0000 |
| commit | f1f9b3d5f5661fda4176b05528b37cb8951785c3 (patch) | |
| tree | 17438d58fcd5165a1a0e054291d20b78657b5b10 /src/ec/google/chromeec/ec.h | |
| parent | 89d8260e3f64a0aa9117f5d39a92743146048348 (diff) | |
| download | coreboot-f1f9b3d5f5661fda4176b05528b37cb8951785c3.tar.gz coreboot-f1f9b3d5f5661fda4176b05528b37cb8951785c3.tar.bz2 coreboot-f1f9b3d5f5661fda4176b05528b37cb8951785c3.zip | |
ec/google/chromeec: Update google_chromeec_usb_pd_control()
Add parameter `active_cable` to obtain the cable type
(active or passive) which is needed for USB-C configuration for
some SoCs (at least Intel TGL and ADL), change the function name to
google_chromeec_usb_pd_get_info() for better understanding.
BUG=b:192947843
Signed-off-by: Derek Huang <derek.huang@intel.corp-partner.google.com>
Change-Id: Ie91a3096d49d5dde75e60ab0f2f38152cef720f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58057
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/ec/google/chromeec/ec.h')
| -rw-r--r-- | src/ec/google/chromeec/ec.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index 743651b0f996..ebb7ae24a13d 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -34,8 +34,8 @@ int google_chromeec_pd_get_amode(uint16_t svid); */ int google_chromeec_usb_get_pd_mux_info(int port, uint8_t *flags); /* Returns data role and type of device connected */ -int google_chromeec_usb_pd_control(int port, bool *ufp, bool *dbg_acc, - uint8_t *dp_mode); +int google_chromeec_usb_pd_get_info(int port, bool *ufp, bool *dbg_acc, + bool *active_cable, uint8_t *dp_mode); int google_chromeec_wait_for_displayport(long timeout); /* Device events */ |