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author | Furquan Shaikh <furquan@google.com> | 2020-05-02 10:24:23 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-05-02 18:45:16 +0000 |
commit | 76cedd2c292352d7dbd45fab70ec272e476d0910 (patch) | |
tree | 21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /src/ec/google | |
parent | e0844636aca974449c7257e846ec816db683d0b9 (diff) | |
download | coreboot-76cedd2c292352d7dbd45fab70ec272e476d0910.tar.gz coreboot-76cedd2c292352d7dbd45fab70ec272e476d0910.tar.bz2 coreboot-76cedd2c292352d7dbd45fab70ec272e476d0910.zip |
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'
BUG=b:155428745
Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/ec/google')
-rw-r--r-- | src/ec/google/chromeec/ec_acpi.c | 8 | ||||
-rw-r--r-- | src/ec/google/chromeec/i2c_tunnel/i2c_tunnel.c | 4 | ||||
-rw-r--r-- | src/ec/google/chromeec/smihandler.c | 2 | ||||
-rw-r--r-- | src/ec/google/wilco/chip.c | 6 | ||||
-rw-r--r-- | src/ec/google/wilco/smihandler.c | 2 |
5 files changed, 11 insertions, 11 deletions
diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 2331c7a492cc..b29c32f3e196 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -5,10 +5,10 @@ * SPDX-License-Identifier: GPL-2.0-or-later */ -#include <arch/acpi.h> -#include <arch/acpi_device.h> -#include <arch/acpigen.h> -#include <arch/acpigen_ps2_keybd.h> +#include <acpi/acpi.h> +#include <acpi/acpi_device.h> +#include <acpi/acpigen.h> +#include <acpi/acpigen_ps2_keybd.h> #include <console/console.h> #include <drivers/usb/acpi/chip.h> #include <stdlib.h> diff --git a/src/ec/google/chromeec/i2c_tunnel/i2c_tunnel.c b/src/ec/google/chromeec/i2c_tunnel/i2c_tunnel.c index 51375f8f22ed..7a110cba2668 100644 --- a/src/ec/google/chromeec/i2c_tunnel/i2c_tunnel.c +++ b/src/ec/google/chromeec/i2c_tunnel/i2c_tunnel.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* This file is part of the coreboot project. */ -#include <arch/acpi_device.h> -#include <arch/acpigen.h> +#include <acpi/acpi_device.h> +#include <acpi/acpigen.h> #include <console/console.h> #include <device/device.h> #include <device/path.h> diff --git a/src/ec/google/chromeec/smihandler.c b/src/ec/google/chromeec/smihandler.c index 5e192a51dabe..fb8bb7e04c27 100644 --- a/src/ec/google/chromeec/smihandler.c +++ b/src/ec/google/chromeec/smihandler.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <ec/google/chromeec/ec.h> diff --git a/src/ec/google/wilco/chip.c b/src/ec/google/wilco/chip.c index 0d0f987da3c7..7516b2a87999 100644 --- a/src/ec/google/wilco/chip.c +++ b/src/ec/google/wilco/chip.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> -#include <arch/acpi_device.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpi_device.h> +#include <acpi/acpigen.h> #include <arch/cpu.h> #include <bootstate.h> #include <cbmem.h> diff --git a/src/ec/google/wilco/smihandler.c b/src/ec/google/wilco/smihandler.c index a9f07fe0c429..f3ed90b5a439 100644 --- a/src/ec/google/wilco/smihandler.c +++ b/src/ec/google/wilco/smihandler.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <console/console.h> #include <cpu/x86/smm.h> |