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| author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | 2022-08-09 11:32:55 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-24 21:28:06 +0000 |
| commit | a434f6155cb67f418076b856d6b5e60d50dbfb35 (patch) | |
| tree | 9afe58087476002f44a6f2167b7635c68d00bca8 /src/ec | |
| parent | 30d8e724e7b045a81815f07b5a568d4aa37461a9 (diff) | |
| download | coreboot-a434f6155cb67f418076b856d6b5e60d50dbfb35.tar.gz coreboot-a434f6155cb67f418076b856d6b5e60d50dbfb35.tar.bz2 coreboot-a434f6155cb67f418076b856d6b5e60d50dbfb35.zip | |
ec/google/chromeec/acpi: Add support for DPTF oem variable event notify
The agah EC code will monitor adapter current to choose corresponding
DPTF oem variable table. When it changes, this event will send to the
ACPI FW through host event and then pass onto the DPTF kernel driver.
This patch adds support for that feature.
BUG=b:238921409
TEST=add Printf() calls to the ACPI,
and check these Printf() will show up in the kernel log
when EC send oem variable table change notify.
Change-Id: I1dbbfd9b3d65b56d77050c9ba9957e54530c3a0e
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66574
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/ec')
| -rw-r--r-- | src/ec/google/chromeec/acpi/ec.asl | 17 | ||||
| -rw-r--r-- | src/ec/google/chromeec/acpi/emem.asl | 1 |
2 files changed, 18 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index ae4758af8b08..99f9344b77cd 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -8,6 +8,9 @@ // DTT Power Participant Device Notification #define POWER_STATE_CHANGE_NOTIFICATION 0x81 +// DTT OEM variables change notification +#define EC_OEM_VARIABLE_DATA_MASK 0x7 +#define INT3400_ODVP_CHANGED 0x88 // Mainboard specific throttle handler #ifdef DPTF_ENABLE_CHARGER @@ -20,6 +23,12 @@ External(\_SB.DPTC, MethodObj) External (\_SB.DPTF.TPWR, DeviceObj) +#ifdef DPTF_ENABLE_OEM_VARIABLES +External (\_SB.DPTF.ODVP, MethodObj) +External (\_SB.DPTF.ODGT, MethodObj) +External (\_SB.DPTF.ODUP, MethodObj) +#endif + Device (EC0) { Name (_HID, EISAID ("PNP0C09")) @@ -334,6 +343,14 @@ Device (EC0) Printf ("EC: THROTTLE START") \_TZ.THRT (1) #endif + +#ifdef DPTF_ENABLE_OEM_VARIABLES + Local0 = ToInteger(EOVD) & EC_OEM_VARIABLE_DATA_MASK + \_SB.DPTF.ODUP(0, Local0) + Local0 = \_SB.DPTF.ODGT(0) + \_SB.DPTF.ODVP() + Notify (\_SB.DPTF, INT3400_ODVP_CHANGED) +#endif } // Throttle Stop diff --git a/src/ec/google/chromeec/acpi/emem.asl b/src/ec/google/chromeec/acpi/emem.asl index dd59503bb653..3f9a457e1828 100644 --- a/src/ec/google/chromeec/acpi/emem.asl +++ b/src/ec/google/chromeec/acpi/emem.asl @@ -53,3 +53,4 @@ Offset (0xa6), GPUD, 8, // GPU Data Offset (0xa7), PWRT, 8, // Power source and change count +EOVD, 8, // EC OEM Variable Data |