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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-18 08:28:12 +0300 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-28 10:37:28 +0000 |
| commit | a4c0e1a51fc724680cb54a1f17813a67ab3b4250 (patch) | |
| tree | 2f55b1fc4476c28880097c2c6f6ce11204259b11 /src/include/acpi | |
| parent | 470f319b9b33283fb85b466566410a1f4365e51c (diff) | |
| download | coreboot-a4c0e1a51fc724680cb54a1f17813a67ab3b4250.tar.gz coreboot-a4c0e1a51fc724680cb54a1f17813a67ab3b4250.tar.bz2 coreboot-a4c0e1a51fc724680cb54a1f17813a67ab3b4250.zip | |
ACPI S3: Clean up resume path
Remove the obscure path in source code, where ACPI S3 resume
was prohibited and acpi_resume() would return and continue
to BS_WRITE_TABLES.
The condition when ACPI S3 would be prohibited needs to be
checked early in romstage already. For the time being, there
has been little interest to have CMOS option to disable
ACPI S3 resume feature.
Change-Id: If5105912759427f94f84d46d1a3141aa75cbd6ef
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include/acpi')
| -rw-r--r-- | src/include/acpi/acpi.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index 6e7db17324fc..58e1dbe48a80 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -987,7 +987,7 @@ unsigned long acpi_create_hest_error_source(acpi_hest_t *hest, acpi_hest_esd_t *esd, u16 type, void *data, u16 len); /* For ACPI S3 support. */ -void acpi_resume(void *wake_vec); +void __noreturn acpi_resume(void *wake_vec); void mainboard_suspend_resume(void); void *acpi_find_wakeup_vector(void); |