arm: libpayload: Add cache coherent DMA memory definition and management

This patch adds a mechanism to set aside a region of cache-coherent
(i.e. usually uncached) virtual memory, which can be used to communicate
with DMA devices without automatic cache snooping (common on ARM)
without the need of explicit flush/invalidation instructions in the
driver code.

This works by setting aside said region in the (board-specific) page
table setup, as exemplary done in this patch for the Snow and Pit
boards. It uses a new mechanism for adding board-specific Coreboot table
entries to describe this region in an entry with the LB_DMA tag.

Libpayload's memory allocator is enhanced to be able to operate on
distinct types/regions of memory. It provides dma_malloc() and
dma_memalign() functions for use in drivers, which by default just
operate on the same heap as their traditional counterparts. However, if
the Coreboot table parsing code finds a CB_DMA section, further requests
through the dma_xxx() functions will return memory from the region
described therein instead.

Change-Id: Ia9c249249e936bbc3eb76e7b4822af2230ffb186
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167155
(cherry picked from commit d142ccdcd902a9d6ab4d495fbe6cbe85c61a5f01)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6622
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 6 insertions, 0 deletions

diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index 3c569a132d87..db3c508285a4 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -218,6 +218,7 @@ struct lb_gpios {
 #define LB_TAG_VDAT		0x0015
 #define LB_TAG_VBNV		0x0019
 #define LB_TAB_VBOOT_HANDOFF	0x0020
+#define LB_TAB_DMA		0x0022
 struct lb_range {
 	uint32_t tag;
 	uint32_t size;
@@ -332,4 +333,9 @@ void uart_fill_lb(void *data);
 void lb_add_serial(struct lb_serial *serial, void *data);
 void lb_add_console(uint16_t consoletype, void *data);
 
+/* Define this in mainboard.c to add board-specific table entries. */
+void lb_board(struct lb_header *header);
+
+struct lb_record *lb_new_record(struct lb_header *header);
+
 #endif /* COREBOOT_TABLES_H */