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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-07 14:18:28 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-16 15:19:33 +0000 |
| commit | 4663f45caa2352760ee08ec28b9c2d6e2e8823f9 (patch) | |
| tree | cde34a0beabcd41ffbda765e7f9dd3d036bbe5cd /src/include/device/device.h | |
| parent | 34cf5619f929775efd819468ba6036e637cfbd85 (diff) | |
| download | coreboot-4663f45caa2352760ee08ec28b9c2d6e2e8823f9.tar.gz coreboot-4663f45caa2352760ee08ec28b9c2d6e2e8823f9.tar.bz2 coreboot-4663f45caa2352760ee08ec28b9c2d6e2e8823f9.zip | |
device/pci_ops: Have only default PCI bus ops available
In the current state of the tree we do not utilise the
mechanism of having per-device overrides for PCI bus
ops.
This change effectively inlines all PCI config accessors
for ramstage as well.
Change-Id: I11c37cadfcbef8fb5657dec6d620e6bccab311a4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/device/device.h')
| -rw-r--r-- | src/include/device/device.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/include/device/device.h b/src/include/device/device.h index 2e2cda9d9460..7d7be732e8e7 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -17,7 +17,6 @@ struct device; struct pci_operations; -struct pci_bus_operations; struct i2c_bus_operations; struct smbus_bus_operations; struct pnp_mode_ops; |