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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-06 18:01:04 -0800 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-09 17:16:09 +0100 |
| commit | 0ca2a0654ca4b403e8a54d558bce07a862820a9d (patch) | |
| tree | 86c845b441c8ae4824bf6178943148ec94441c6d /src/include/device/dram | |
| parent | 75d8d8da47a3cc759d7395f5b0ef91ba13a59e51 (diff) | |
| download | coreboot-0ca2a0654ca4b403e8a54d558bce07a862820a9d.tar.gz coreboot-0ca2a0654ca4b403e8a54d558bce07a862820a9d.tar.bz2 coreboot-0ca2a0654ca4b403e8a54d558bce07a862820a9d.zip | |
src/include: Fix unsigned warnings
Fix warning detected by checkpatch.pl:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
BRANCH=none
BUG=None
TEST=Build and run on Galileo Gen2
Change-Id: I23d9b4b715aa74acc387db8fb8d3c73bd5cabfaa
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18607
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/device/dram')
| -rw-r--r-- | src/include/device/dram/ddr3.h | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 905aa8407aba..bc9fca7495f2 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -106,35 +106,35 @@ typedef union dimm_flags_st { struct { /* Indicates if rank 1 of DIMM uses a mirrored pin mapping. See: * Annex K: Serial Presence Detect (SPD) for DDR3 SDRAM */ - unsigned pins_mirrored:1; + unsigned int pins_mirrored:1; /* Module can work at 1.50V - All DIMMS must be 1.5V operable */ - unsigned operable_1_50V:1; + unsigned int operable_1_50V:1; /* Module can work at 1.35V */ - unsigned operable_1_35V:1; + unsigned int operable_1_35V:1; /* Module can work at 1.20V */ - unsigned operable_1_25V:1; + unsigned int operable_1_25V:1; /* Has an 8-bit bus extension, meaning the DIMM supports ECC */ - unsigned is_ecc:1; + unsigned int is_ecc:1; /* DLL-Off Mode Support */ - unsigned dll_off_mode:1; + unsigned int dll_off_mode:1; /* Indicates a drive strength of RZQ/6 (40 Ohm) is supported */ - unsigned rzq6_supported:1; + unsigned int rzq6_supported:1; /* Indicates a drive strength of RZQ/7 (35 Ohm) is supported */ - unsigned rzq7_supported:1; + unsigned int rzq7_supported:1; /* Partial Array Self Refresh */ - unsigned pasr:1; + unsigned int pasr:1; /* On-die Thermal Sensor Readout */ - unsigned odts:1; + unsigned int odts:1; /* Auto Self Refresh */ - unsigned asr:1; + unsigned int asr:1; /* Extended temperature range supported */ - unsigned ext_temp_range:1; + unsigned int ext_temp_range:1; /* Operating at extended temperature requires 2X refresh rate */ - unsigned ext_temp_refresh:1; + unsigned int ext_temp_refresh:1; /* Thermal sensor incorporated */ - unsigned therm_sensor:1; + unsigned int therm_sensor:1; }; - unsigned raw; + unsigned int raw; } dimm_flags_t; /** |