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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-01 20:10:55 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-09-06 04:38:55 +0000 |
| commit | 3397aa1fd469335e99befec2fbf93d505f58d70c (patch) | |
| tree | 3d9d00283599c8db2372112ce2e6f011dd307512 /src/include/device/dram | |
| parent | 57443690254d86558c38682f65e85ae69e3148bc (diff) | |
| download | coreboot-3397aa1fd469335e99befec2fbf93d505f58d70c.tar.gz coreboot-3397aa1fd469335e99befec2fbf93d505f58d70c.tar.bz2 coreboot-3397aa1fd469335e99befec2fbf93d505f58d70c.zip | |
device/dram/ddr2: Add a function to normalize tCLK
Also make most significant bit function accessible outside the scope
of this file.
Change-Id: I3ab39d38a243edddfde8f70ebd23f79ff774e90e
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18320
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/include/device/dram')
| -rw-r--r-- | src/include/device/dram/ddr2.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h index 8ea80b986aba..ea9b3ba5355b 100644 --- a/src/include/device/dram/ddr2.h +++ b/src/include/device/dram/ddr2.h @@ -213,6 +213,7 @@ u32 spd_decode_spd_size_ddr2(u8 byte0); u32 spd_decode_eeprom_size_ddr2(u8 byte1); int spd_decode_ddr2(struct dimm_attr_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2]); void dram_print_spd_ddr2(const struct dimm_attr_st *dimm); - +void normalize_tck(u32 *tclk); +u8 spd_get_msbs(u8 c); #endif /* DEVICE_DRAM_DDR2L_H */ |