diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-26 22:33:51 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-30 20:06:06 +0000 |
| commit | a0b366d550e720f2e086db20b5f7f7b07ccabc02 (patch) | |
| tree | d6f1d76e1b5c90d7f26250559e67b94c25f32c4c /src/include/device/pci.h | |
| parent | 50b4f78344e800bdfe9ef7d2b64331a24191e112 (diff) | |
| download | coreboot-a0b366d550e720f2e086db20b5f7f7b07ccabc02.tar.gz coreboot-a0b366d550e720f2e086db20b5f7f7b07ccabc02.tar.bz2 coreboot-a0b366d550e720f2e086db20b5f7f7b07ccabc02.zip | |
device/pci_early: Drop some __SIMPLE_DEVICE__ use
The simple PCI config accessors are always available
under names pci_s_[read|write]_configX.
We have some use for PCI bridge configurations and
resets in romstages, so expose them.
Change-Id: Ia97a4e1f1b4c80b3dae800d80615bdc118414ed3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/device/pci.h')
| -rw-r--r-- | src/include/device/pci.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 8d6a9ae52020..f0911054387f 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -116,8 +116,10 @@ struct msix_entry *pci_msix_get_table(struct device *dev); pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev); pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id, unsigned int bus); -void pci_early_mmio_window(pci_devfn_t p2p_bridge, u32 mmio_base, - u32 mmio_size); +void pci_s_assert_secondary_reset(pci_devfn_t p2p_bridge); +void pci_s_deassert_secondary_reset(pci_devfn_t p2p_bridge); +void pci_s_bridge_set_secondary(pci_devfn_t p2p_bridge, u8 secondary); + int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base); static inline int pci_base_address_is_memory_space(unsigned int attr) |