summaryrefslogtreecommitdiffstats
path: root/src/include/device/pci_ids.h
diff options
context:
space:
mode:
authorMichał Żygowski <michal.zygowski@3mdeb.com>2022-09-29 13:29:02 +0200
committerMichał Żygowski <michal.zygowski@3mdeb.com>2022-10-06 09:24:54 +0000
commit9baffae485a7008ddc232b90126fe43615d61269 (patch)
treeda3f475141da52329a0b788b29041fee8689a7e2 /src/include/device/pci_ids.h
parent1538d15e5cb70d3ee6e6d776dfbf4839bba4222d (diff)
downloadcoreboot-9baffae485a7008ddc232b90126fe43615d61269.tar.gz
coreboot-9baffae485a7008ddc232b90126fe43615d61269.tar.bz2
coreboot-9baffae485a7008ddc232b90126fe43615d61269.zip
soc/intel/cmn/gfx: Add missing CML-U IGD device IDs
Intel Core i5-10210U can have the following IGD Device IDs 0x9B21/0x9B41/0x9BAC/0x9BCA/0x9BCC according to Intel ARK. Some of these IDs were not present in coreboot source nor hooked to the common graphics driver. Add the missing IDs so that the graphics driver will probe on the mentioned processor and detect the framebuffer. TEST=Boot Protectli VP4650 with i5-10210U and see framebuffer is detected when using FSP GOP and libgfxinit. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Iee720a272367aead31c8c8fa712bade1b6e53948 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67975 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device/pci_ids.h')
-rw-r--r--src/include/device/pci_ids.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 434449ccba16..3da741001659 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3925,7 +3925,9 @@
#define PCI_DID_INTEL_CML_GT1_ULT_3 0x9B2B
#define PCI_DID_INTEL_CML_GT1_ULT_4 0x9B2C
#define PCI_DID_INTEL_CML_GT2_ULT_5 0x9BAA
+#define PCI_DID_INTEL_CML_GT2_ULT_8 0x9BAC
#define PCI_DID_INTEL_CML_GT2_ULT_6 0x9BCA
+#define PCI_DID_INTEL_CML_GT2_ULT_7 0x9BCC
#define PCI_DID_INTEL_CML_GT2_ULT_3 0x9B4B
#define PCI_DID_INTEL_CML_GT2_ULT_4 0x9B4C
#define PCI_DID_INTEL_CML_GT1_ULX_1 0x9B20