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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-28 16:05:08 +0100 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-19 03:25:05 +0000 |
commit | 1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b (patch) | |
tree | 096daea96736744fef239ec85a766777647119d8 /src/include/device/pci_mmio_cfg.h | |
parent | 4f66cb9b2867bcdeb47df9fe76e8893d53f85fb8 (diff) | |
download | coreboot-1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b.tar.gz coreboot-1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b.tar.bz2 coreboot-1cb9cd5798966bf026e5f1ef3abf7642fa1bc41b.zip |
Drop ROMCC code and header guards
Change-Id: I730f80afd8aad250f26534435aec24bea75a849c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/include/device/pci_mmio_cfg.h')
-rw-r--r-- | src/include/device/pci_mmio_cfg.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/include/device/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h index 30945f4c2785..aa159705d1fa 100644 --- a/src/include/device/pci_mmio_cfg.h +++ b/src/include/device/pci_mmio_cfg.h @@ -20,7 +20,6 @@ #include <device/mmio.h> #include <device/pci_type.h> -#if !defined(__ROMCC__) /* By not assigning this to CONFIG_MMCONF_BASE_ADDRESS here we * prevent some sub-optimal constant folding. */ @@ -110,8 +109,6 @@ uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg) return (uint32_t *)&pcicfg(dev)->reg32[reg / sizeof(uint32_t)]; } -#endif /* !defined(__ROMCC__) */ - #if CONFIG(MMCONF_SUPPORT) #if CONFIG_MMCONF_BASE_ADDRESS == 0 |