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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2022-01-26 13:47:34 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-21 15:23:12 +0000 |
| commit | 2164c308b45aa6d1e1e45e62b9cec7aeb2c9cb9d (patch) | |
| tree | c2e1e1ae89f88a6da29fe4dd5fb94fbdb09532af /src/include/device | |
| parent | e0ddea49d1cd6cf3137505c555f8a110ea8c89a8 (diff) | |
| download | coreboot-2164c308b45aa6d1e1e45e62b9cec7aeb2c9cb9d.tar.gz coreboot-2164c308b45aa6d1e1e45e62b9cec7aeb2c9cb9d.tar.bz2 coreboot-2164c308b45aa6d1e1e45e62b9cec7aeb2c9cb9d.zip | |
include/device/dram/ddr3.h: Don't redefine 'printram(x, ...)'
'printram(x, ...)' is already defined in 'include/device/dram/common.h' file
Change-Id: I75e19065b9e713df3190202b7ca9e9cd8f3f44a6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/dram/ddr3.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 9ec5248af7d5..b109a15a61ab 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -32,21 +32,6 @@ #define SPD_DIMM_PART_LEN 18 /** @} */ -/** - * \brief Convenience macro for enabling printk with CONFIG(DEBUG_RAM_SETUP) - * - * Use this macro instead of printk(); for verbose RAM initialization messages. - * When CONFIG(DEBUG_RAM_SETUP) is not selected, these messages are automatically - * disabled. - * @{ - */ -#if CONFIG(DEBUG_RAM_SETUP) -#define printram(x, ...) printk(BIOS_DEBUG, x, ##__VA_ARGS__) -#else -#define printram(x, ...) -#endif -/** @} */ - /* * Module type (byte 3, bits 3:0) of SPD * This definition is specific to DDR3. DDR2 SPDs have a different structure. |