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| author | Subrata Banik <subratabanik@google.com> | 2022-12-23 18:09:11 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-12-27 04:41:12 +0000 |
| commit | 3a60e5c827b4ae87114f208a28dfd43e6145ccd5 (patch) | |
| tree | 1b5bde6886d10c6fd0a35974bf36c2decf6830c6 /src/include/device | |
| parent | 11e1950d2600fa8fd2f792423d013726b1a54333 (diff) | |
| download | coreboot-3a60e5c827b4ae87114f208a28dfd43e6145ccd5.tar.gz coreboot-3a60e5c827b4ae87114f208a28dfd43e6145ccd5.tar.bz2 coreboot-3a60e5c827b4ae87114f208a28dfd43e6145ccd5.zip | |
drivers/intel/ish: Add ADL-P ISH DID
This patch adds ISH ID for ADL-P to ensure dynamic ASL code is
added into SSDT.
With this patch:
Scope (\_SB.PCI0.ISHB)
{
Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
{
ToUUID ("70d24161-6dd5-4c9e-8070-705531292865"),
Package (0x01)
{
Package (0x02)
{
"DmaProperty",
One
}
}
})
}
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I48dc6056155824239bb88eda2b0ff5bcd36ced15
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71262
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyle Lin <kylelinck@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 548ad0019973..5668053d1bc3 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2183,6 +2183,7 @@ #define PCI_DID_INTEL_TGL_H_ISHB 0x43fc #define PCI_DID_INTEL_MTL_ISHB 0x7e45 #define PCI_DID_INTEL_ADL_N_ISHB 0x54fc +#define PCI_DID_INTEL_ADL_P_ISHB 0x51fc /* Intel 82371FB (PIIX) */ #define PCI_DID_INTEL_82371FB_ISA 0x122e |