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authorNico Huber <nico.h@gmx.de>2022-08-05 13:02:52 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-08-17 16:29:39 +0000
commit9099feaa94670af2dd558de35b74452570452028 (patch)
treea10e50cee146747362bce93800f985a397263d26 /src/include/device
parent5ffc2c8a3f38fbb7be2faadf207590acd3999205 (diff)
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pciexp_device: Introduce pciexp_find_ext_vendor_cap()
Vendors can choose to add non-standard capabilities inside a Vendor-Specific Extended Capability. These are identified by the Extended Capability ID 0x0b. Change-Id: Idd6dd0e98bd53b19077afdd4c402114578bec966 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66454 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/include/device')
-rw-r--r--src/include/device/pci_def.h1
-rw-r--r--src/include/device/pciexp.h2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index fa520674a861..0eedd513b2fa 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -460,6 +460,7 @@
#define PCI_EXT_CAP_ID_VC 2
#define PCI_EXT_CAP_ID_DSN 3
#define PCI_EXT_CAP_ID_PWR 4
+#define PCI_EXT_CAP_ID_VNDR 0x0b
/* Extended Capability lists*/
#define PCIE_EXT_CAP_OFFSET 0x100
diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h
index 5a996834d215..d8162405ad91 100644
--- a/src/include/device/pciexp.h
+++ b/src/include/device/pciexp.h
@@ -34,6 +34,8 @@ extern struct device_operations default_pciexp_hotplug_ops_bus;
unsigned int pciexp_find_extended_cap(const struct device *dev, unsigned int cap,
unsigned int offset);
+unsigned int pciexp_find_ext_vendor_cap(const struct device *dev, unsigned int cap,
+ unsigned int offset);
static inline bool pciexp_is_downstream_port(int type)
{