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| author | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2022-08-22 17:27:11 -0500 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-08-25 01:00:44 +0000 |
| commit | bb9d106eab6212229fb1d6d4645f93bb883850ac (patch) | |
| tree | 9b3b1448c16703f3e9e695d5f38b81561b71b2d3 /src/include/device | |
| parent | 65fe21f1c96a0762ba764fe47c8dc1d9cb7ee217 (diff) | |
| download | coreboot-bb9d106eab6212229fb1d6d4645f93bb883850ac.tar.gz coreboot-bb9d106eab6212229fb1d6d4645f93bb883850ac.tar.bz2 coreboot-bb9d106eab6212229fb1d6d4645f93bb883850ac.zip | |
device/dram: Add function to convert freq to MT/s for (LP)DDR5
As the frequency field in the SMBIOS type 17 table is deprecated,
we need to provide the maximum and configured speed in MT/s. Add
a method to convert from frequency to MT/s using a lookup table.
BUG=b:239000826
TEST=Build and verify with other patches in train
Change-Id: I0402b33a667f7d72918365a6a79b13c5b1719c0d
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66953
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/dram/ddr5.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/include/device/dram/ddr5.h b/src/include/device/dram/ddr5.h new file mode 100644 index 000000000000..a50912637154 --- /dev/null +++ b/src/include/device/dram/ddr5.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef DEVICE_DRAM_DDR5_H +#define DEVICE_DRAM_DDR5_H + +/** + * @file ddr5.h + * + * \brief Utilities for decoding (LP)DDR5 info + */ + +#include <device/dram/common.h> +#include <types.h> + +/** + * Converts DDR5 clock speed in MHz to the standard reported speed in MT/s + */ +uint16_t ddr5_speed_mhz_to_reported_mts(uint16_t speed_mhz); + +#endif /* DEVICE_DRAM_DDR5_H */ |