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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2022-11-14 08:47:34 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-18 15:45:56 +0000 |
| commit | ce4dc66319809fb9002ceb8df9c96894df26709f (patch) | |
| tree | 7d5e4138f9ed787d1e94439d06657ee9a9c3ee70 /src/include/device | |
| parent | 1c6b02a8b60470a94301e3034707af88b9980c96 (diff) | |
| download | coreboot-ce4dc66319809fb9002ceb8df9c96894df26709f.tar.gz coreboot-ce4dc66319809fb9002ceb8df9c96894df26709f.tar.bz2 coreboot-ce4dc66319809fb9002ceb8df9c96894df26709f.zip | |
soc/intel/meteorlake: Add Meteor Lake MCH device ID
Add Meteor Lake MCH device ID 0x7d15.
TEST=Build and verify boot on MTL RVP
With patch, coreboot log:
`[DEBUG] MCH: device id 7d15 (rev 00) is Meteorlake P`
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: If46b01910239173cd74bf6eebc69a81291b6e15a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 5e270cec1f94..f1f77e092bcf 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4131,6 +4131,7 @@ #define PCI_DID_INTEL_MTL_P_ID_1 0x7D01 #define PCI_DID_INTEL_MTL_P_ID_2 0x7D02 #define PCI_DID_INTEL_MTL_P_ID_3 0x7d14 +#define PCI_DID_INTEL_MTL_P_ID_4 0x7d15 #define PCI_DID_INTEL_RPL_P_ID_1 0xa706 #define PCI_DID_INTEL_RPL_P_ID_2 0xa707 #define PCI_DID_INTEL_RPL_P_ID_3 0xa708 |