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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-11-08 08:30:06 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-11-30 16:46:16 +0100 |
| commit | ef9a9ea3b7585354d447ab0b3145e1b357226647 (patch) | |
| tree | f669c9bf0b145e1212ac40cb33404c2f24de7bb5 /src/include/elog.h | |
| parent | 4ed99ad067a7bd9f5ef6004c7b0e5f9f7edbe0d5 (diff) | |
| download | coreboot-ef9a9ea3b7585354d447ab0b3145e1b357226647.tar.gz coreboot-ef9a9ea3b7585354d447ab0b3145e1b357226647.tar.bz2 coreboot-ef9a9ea3b7585354d447ab0b3145e1b357226647.zip | |
soc/intel/common: Add save/restore for variable MRC data
Piggy-back on existing MRC cache infrastructure to store variable MRC data.
Only one set of data can be valid at given point of time. Currently this
magically happens because region alignment is forced to 0x1000 and region
itself is of the same size. This needs to be somehow programmatically
enforced.
Change-Id: I8a660d356ca760b8ff9907396fb9b34cb16cf1db
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/17320
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/include/elog.h')
| -rw-r--r-- | src/include/elog.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/elog.h b/src/include/elog.h index f2e587cdd58e..501e30db3d4d 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -160,6 +160,7 @@ struct elog_event_data_me_extended { #define ELOG_TYPE_MEM_CACHE_UPDATE 0xaa #define ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL 0 #define ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY 1 +#define ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE 2 #define ELOG_MEM_CACHE_UPDATE_STATUS_SUCCESS 0 #define ELOG_MEM_CACHE_UPDATE_STATUS_FAIL 1 struct elog_event_mem_cache_update { |