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| author | Myles Watson <mylesgw@gmail.com> | 2010-03-19 02:33:40 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-03-19 02:33:40 +0000 |
| commit | 342619526c0e7bd084c6739782e4b332e01fa564 (patch) | |
| tree | 84a934c096bf9e89e4e76e52d66ff32db049a76c /src/include/lib.h | |
| parent | 78acf932912669eb0eb7f7280da1b3c550035ebb (diff) | |
| download | coreboot-342619526c0e7bd084c6739782e4b332e01fa564.tar.gz coreboot-342619526c0e7bd084c6739782e4b332e01fa564.tar.bz2 coreboot-342619526c0e7bd084c6739782e4b332e01fa564.zip | |
Get rid of a few warnings:
1. Add some more prototypes to lib.h
2. Include console.h when not using romcc
3. Eliminate an unused function
4. Set a default for SSE2, since it is just for ramtest performance
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/include/lib.h')
| -rw-r--r-- | src/include/lib.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/include/lib.h b/src/include/lib.h index d8e4eec2c361..41b286a6b637 100644 --- a/src/include/lib.h +++ b/src/include/lib.h @@ -19,8 +19,15 @@ /* This file is for "nuisance prototypes" that have no other home. */ +#ifndef __LIB_H__ +#define __LIB_H__ + +#ifndef __ROMCC__ /* romcc doesn't support prototypes. */ + +#ifndef __PRE_RAM__ /* Conflicts with romcc_io.h */ /* Defined in src/lib/clog2.c */ unsigned long log2(unsigned long x); +#endif /* Defined in src/lib/lzma.c */ unsigned long ulzma(unsigned char *src, unsigned char *dst); @@ -28,3 +35,18 @@ unsigned long ulzma(unsigned char *src, unsigned char *dst); /* Defined in src/arch/i386/boot/gdt.c */ void move_gdt(void); +/* Defined in src/lib/ramtest.c */ +void ram_check(unsigned long start, unsigned long stop); + +/* Defined in src/pc80/serial.c */ +void uart_init(void); + +/* Defined in romstage.c */ +#if defined(CONFIG_CPU_AMD_LX) && CONFIG_CPU_AMD_LX +void cache_as_ram_main(void); +#else +void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); +#endif + +#endif /* __ROMCC__ */ +#endif /* __LIB_H__ */ |