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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-07 17:45:12 -0800 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-13 17:23:37 +0100 |
| commit | 6a566d7fbee8e81fa22916a29339e5991872edfb (patch) | |
| tree | 21840b8f2965439422e809ab56f9ef19cdccf4bd /src/include/pc80 | |
| parent | d0f26fcea2fdab02d9b9fc1fceb9e782694a55bc (diff) | |
| download | coreboot-6a566d7fbee8e81fa22916a29339e5991872edfb.tar.gz coreboot-6a566d7fbee8e81fa22916a29339e5991872edfb.tar.bz2 coreboot-6a566d7fbee8e81fa22916a29339e5991872edfb.zip | |
src/include: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:
WARNING: line over 80 characters
Changed a few comments to reduce line length. File
src/include/cpu/amd/vr.h was skipped.
TEST=Build and run on Galileo Gen2
Change-Id: Ie3c07111acc1f89923fb31135684a6d28a505b61
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18687
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/include/pc80')
| -rw-r--r-- | src/include/pc80/mc146818rtc.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index be90358b05ae..ef19a15363bc 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -40,7 +40,9 @@ /* 2 values for divider stage reset, others for "testing purposes only" */ # define RTC_DIV_RESET1 0x60 # define RTC_DIV_RESET2 0x70 - /* Periodic intr. / Square wave rate select. 0 = none, 1 = 32.8kHz,... 15 = 2Hz */ + /* Periodic intr. / Square wave rate select. 0 = none, + * 1 = 32.8kHz,... 15 = 2Hz + */ # define RTC_RATE_SELECT 0x0F # define RTC_RATE_NONE 0x00 # define RTC_RATE_32786HZ 0x01 @@ -188,7 +190,8 @@ unsigned int read_option_lowlevel(unsigned int start, unsigned int size, #else /* defined(__ROMCC__) */ #include <drivers/pc80/rtc/mc146818rtc_early.c> #endif /* !defined(__ROMCC__) */ -#define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, CMOS_VLEN_ ##name, (default)) +#define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, \ + CMOS_VLEN_ ##name, (default)) #if CONFIG_CMOS_POST #if CONFIG_USE_OPTION_TABLE |