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| author | Martin Roth <martinroth@google.com> | 2017-06-24 14:13:53 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-13 23:55:05 +0000 |
| commit | 9634547eae10dc6b30014208124d54a6ddc7f987 (patch) | |
| tree | a3d89a1c651cd743858b39e3220446d0450ab6d2 /src/include/pc80 | |
| parent | 1858d6a90a81aac67cde90190d8a332b2e817c9d (diff) | |
| download | coreboot-9634547eae10dc6b30014208124d54a6ddc7f987.tar.gz coreboot-9634547eae10dc6b30014208124d54a6ddc7f987.tar.bz2 coreboot-9634547eae10dc6b30014208124d54a6ddc7f987.zip | |
src/include: add IS_ENABLED() around Kconfig symbol references
Change-Id: I2fbe6376a1cf98d328464556917638a5679641d2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/include/pc80')
| -rw-r--r-- | src/include/pc80/mc146818rtc.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index ec0bf8effbee..f6a1c0437231 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -1,7 +1,7 @@ #ifndef PC80_MC146818RTC_H #define PC80_MC146818RTC_H -#if CONFIG_ARCH_X86 +#if IS_ENABLED(CONFIG_ARCH_X86) #include <arch/io.h> #include <types.h> @@ -193,8 +193,8 @@ unsigned int read_option_lowlevel(unsigned int start, unsigned int size, #define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, \ CMOS_VLEN_ ##name, (default)) -#if CONFIG_CMOS_POST -#if CONFIG_USE_OPTION_TABLE +#if IS_ENABLED(CONFIG_CMOS_POST) +#if IS_ENABLED(CONFIG_USE_OPTION_TABLE) # include "option_table.h" # define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3) #else @@ -241,7 +241,7 @@ static inline void cmos_post_init(void) /* Initialize to zero */ cmos_write(0, CMOS_POST_BANK_0_OFFSET); cmos_write(0, CMOS_POST_BANK_1_OFFSET); -#if CONFIG_CMOS_POST_EXTRA +#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA) cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); #endif |