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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-06-20 18:57:19 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-24 18:24:27 +0200 |
| commit | ed3ccc2cad5d71f47f361d2eda8e0a2dbf1dba53 (patch) | |
| tree | c0c66d5db2ef079b23b83dc051c06d78cf4b72fa /src/include/spd.h | |
| parent | aa8e7e777662e512daca0e82df243c2dcdbba4db (diff) | |
| download | coreboot-ed3ccc2cad5d71f47f361d2eda8e0a2dbf1dba53.tar.gz coreboot-ed3ccc2cad5d71f47f361d2eda8e0a2dbf1dba53.tar.bz2 coreboot-ed3ccc2cad5d71f47f361d2eda8e0a2dbf1dba53.zip | |
SPD: Add DRAM devices types
Add SDRAM or module types to byte 2.
Change-Id: Id6e654a3a714c164bc9a7fbd9ab3e2f3c44ca5ea
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15265
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/include/spd.h')
| -rw-r--r-- | src/include/spd.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/spd.h b/src/include/spd.h index 69a45ff06bc7..6424d3323517 100644 --- a/src/include/spd.h +++ b/src/include/spd.h @@ -118,6 +118,10 @@ enum spd_memory_type { SPD_MEMORY_TYPE_FBDIMM_DDR2 = 0x09, SPD_MEMORY_TYPE_FB_PROBE_DDR2 = 0x0a, SPD_MEMORY_TYPE_SDRAM_DDR3 = 0x0b, + SPD_MEMORY_TYPE_DDR4_SDRAM = 0x0c, + SPD_MEMORY_TYPE_DDR4E_SDRAM = 0x0e, + SPD_MEMORY_TYPE_LPDDR3_SDRAM = 0x0f, + SPD_MEMORY_TYPE_LPDDR4_SDRAM = 0x10, }; /* SPD_MODULE_VOLTAGE values. */ |