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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-06-15 21:13:07 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-24 18:09:18 +0200 |
| commit | c8d24dd150a1922657d6ff396da8f11da24569f7 (patch) | |
| tree | 9048279f90ed2bee50d10a87652f991974534da7 /src/include/spd_ddr2.h | |
| parent | 46bfce335337a11a9b48c496672bd6020e8dbaeb (diff) | |
| download | coreboot-c8d24dd150a1922657d6ff396da8f11da24569f7.tar.gz coreboot-c8d24dd150a1922657d6ff396da8f11da24569f7.tar.bz2 coreboot-c8d24dd150a1922657d6ff396da8f11da24569f7.zip | |
SPD: fix and add DDR2 SDRAM memory module types
Correct the definitions and add 72b-SO-CDIMM and 72b-SO-RDIMM
Change-Id: I33532e30f45f6c8c0eb6d47b0bea87689d2d9a1a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15204
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/include/spd_ddr2.h')
| -rw-r--r-- | src/include/spd_ddr2.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/include/spd_ddr2.h b/src/include/spd_ddr2.h index a31b4aa25178..4e2356305e8f 100644 --- a/src/include/spd_ddr2.h +++ b/src/include/spd_ddr2.h @@ -20,12 +20,14 @@ #define SPD_MEM_TYPE_SDRAM_DDR2 0x08 #define SPD_DIMM_TYPE 20 /* x bit0 or bit4 =1 mean registered*/ - #define SPD_DIMM_TYPE_RDIMM (1<<0) - #define SPD_DIMM_TYPE_UDIMM (1<<1) - #define SPD_DIMM_TYPE_SODIMM (1<<2) - #define SPD_DIMM_TYPE_uDIMM (1<<3) - #define SPD_DIMM_TYPE_mRDIMM (1<<4) - #define SPD_DIMM_TYPE_mUDIMM (1<<5) + #define SPD_DIMM_TYPE_RDIMM 0x01 + #define SPD_DIMM_TYPE_UDIMM 0x02 + #define SPD_DIMM_TYPE_SODIMM 0x04 + #define SPD_72B_SO_CDIMM 0x06 + #define SPD_72B_SO_RDIMM 0x07 + #define SPD_DIMM_TYPE_uDIMM 0x08 + #define SPD_DIMM_TYPE_mRDIMM 0x10 + #define SPD_DIMM_TYPE_mUDIMM 0x20 #define SPD_MOD_ATTRIB 21 #define SPD_MOD_ATTRIB_DIFCK 0x20 |