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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-03-09 14:20:25 +0100 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-09-16 13:02:50 +0000 |
| commit | 0f8bf022fca97659efef400794d38ec0d1f48d2b (patch) | |
| tree | 28938953b32650e403459943cf03a4dc535ceeb1 /src/include/spi_flash.h | |
| parent | ee8780eb788047755b5cbb6915b42f9adab533e6 (diff) | |
| download | coreboot-0f8bf022fca97659efef400794d38ec0d1f48d2b.tar.gz coreboot-0f8bf022fca97659efef400794d38ec0d1f48d2b.tar.bz2 coreboot-0f8bf022fca97659efef400794d38ec0d1f48d2b.zip | |
drivers/spi: Read Winbond's flash protection bits
Extend the generic flash interface to probe for write protected regions.
Add Winbond custom code to return flash protection.
Tested on Cavium EVB CN81xx using W25Q128.
Change-Id: I933a8abdc28174ec32acf323c102d606b58c1ea5
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25082
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/spi_flash.h')
| -rw-r--r-- | src/include/spi_flash.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index f7f3b3dbdf07..9f8d2d06eaf6 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -40,6 +40,16 @@ struct spi_flash_ops { const void *buf); int (*erase)(const struct spi_flash *flash, u32 offset, size_t len); int (*status)(const struct spi_flash *flash, u8 *reg); + /* + * Returns 1 if the whole region is software write protected. + * Hardware write protection mechanism aren't accounted. + * If the write protection could be changed, due to unlocked status + * register for example, 0 should be returned. + * Returns -1 on error. + */ + int (*get_write_protection)(const struct spi_flash *flash, + const struct region *region); + }; struct spi_flash { @@ -51,6 +61,7 @@ struct spi_flash { u8 erase_cmd; u8 status_cmd; const struct spi_flash_ops *ops; + const void *driver_private; }; void lb_spi_flash(struct lb_header *header); @@ -93,6 +104,21 @@ int spi_flash_write(const struct spi_flash *flash, u32 offset, size_t len, const void *buf); int spi_flash_erase(const struct spi_flash *flash, u32 offset, size_t len); int spi_flash_status(const struct spi_flash *flash, u8 *reg); + +/* + * Return the vendor dependent SPI flash write protection state. + * @param flash : A SPI flash device + * @param region: A subregion of the device's region + * + * Returns: + * -1 on error + * 0 if the device doesn't support block protection + * 0 if the device doesn't enable block protection + * 0 if given range isn't covered by block protection + * 1 if given range is covered by block protection + */ +int spi_flash_is_write_protected(const struct spi_flash *flash, + const struct region *region); /* * Some SPI controllers require exclusive access to SPI flash when volatile * operations like erase or write are being performed. In such cases, |