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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-29 16:17:33 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-14 19:42:49 +0200 |
| commit | 1110495de926db4b21b9969da522e5270c67f115 (patch) | |
| tree | 04a04b6e797173c1b3639a4c4ecb90c544ab84ab /src/include/spi_flash.h | |
| parent | 77d1280d0c866a9f85e62f74c43fe8d021a4ff39 (diff) | |
| download | coreboot-1110495de926db4b21b9969da522e5270c67f115.tar.gz coreboot-1110495de926db4b21b9969da522e5270c67f115.tar.bz2 coreboot-1110495de926db4b21b9969da522e5270c67f115.zip | |
SPI: Split writes using spi_crop_chunk()
SPI controllers in Intel and AMD bridges have a slightly different
restriction on how long transactions they can handle.
Change-Id: I3d149d4b7e7e9633482a153d5e380a86c553d871
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6163
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/include/spi_flash.h')
| -rw-r--r-- | src/include/spi_flash.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 61c931e32c53..70ca784c9003 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -39,14 +39,6 @@ const typeof( ((type *)0)->member ) *__mptr = (ptr); \ (type *)( (char *)__mptr - offsetof(type,member) );}) -#define CONFIG_ICH_SPI -#ifdef CONFIG_ICH_SPI -#define CONTROLLER_PAGE_LIMIT 64 -#else -/* any number larger than 4K would do, actually */ -#define CONTROLLER_PAGE_LIMIT ((int)(~0U>>1)) -#endif - struct spi_flash { struct spi_slave *spi; |