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| author | Meera Ravindranath <meera.ravindranath@intel.com> | 2019-08-27 16:16:56 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-08-28 11:12:33 +0000 |
| commit | 970f1a4101052a89e45d6034852ab544e7c7afd5 (patch) | |
| tree | 0e0b9de4d376c9bd77dea282a811d45a720ce3a7 /src/include | |
| parent | 640215e6f4f2c81c18ba683297fc2362d778db2e (diff) | |
| download | coreboot-970f1a4101052a89e45d6034852ab544e7c7afd5.tar.gz coreboot-970f1a4101052a89e45d6034852ab544e7c7afd5.tar.bz2 coreboot-970f1a4101052a89e45d6034852ab544e7c7afd5.zip | |
soc/intel/cnl: Add CML IGD IDs
BUG=b:139798422
TEST=Build and boot CMLRVP.
Change-Id: Ib79995606f6da12bfa7aa5c1a1dbc0b972bb1688
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Signed-off-by: Usha P <usha.p@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35120
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/device/pci_ids.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index cdd1c623d06f..5ad61e090d45 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3083,6 +3083,8 @@ #define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2 0x9B4A #define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3 0x9B2B #define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4 0x9B2C +#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5 0x9BAA +#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6 0x9BCA #define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3 0x9B4B #define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4 0x9B4C #define PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1 0x9B20 |