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| author | Julius Werner <jwerner@chromium.org> | 2019-12-11 17:09:39 -0800 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2020-11-21 10:43:53 +0000 |
| commit | 1e37c9ca465a14d55adeacb332354771543437b5 (patch) | |
| tree | 6b38606a32261cb99a4518b925278e97c8f120a6 /src/lib/Kconfig | |
| parent | 7d11513ab3281ef3bee83b4b523219b683d3ddc1 (diff) | |
| download | coreboot-1e37c9ca465a14d55adeacb332354771543437b5.tar.gz coreboot-1e37c9ca465a14d55adeacb332354771543437b5.tar.bz2 coreboot-1e37c9ca465a14d55adeacb332354771543437b5.zip | |
cbfs: Add metadata cache
This patch adds a new CBFS "mcache" (metadata cache) -- a memory buffer
that stores the headers of all CBFS files. Similar to the existing FMAP
cache, this cache should reduce the amount of SPI accesses we need to do
every boot: rather than having to re-read all CBFS headers from SPI
flash every time we're looking for a file, we can just walk the same
list in this in-memory copy and finally use it to directly access the
flash at the right position for the file data.
This patch adds the code to support the cache but doesn't enable it on
any platform. The next one will turn it on by default.
Change-Id: I5b1084bfdad1c6ab0ee1b143ed8dd796827f4c65
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38423
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/lib/Kconfig')
| -rw-r--r-- | src/lib/Kconfig | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/lib/Kconfig b/src/lib/Kconfig index d6e7e51d5c25..ab2b9c59b90f 100644 --- a/src/lib/Kconfig +++ b/src/lib/Kconfig @@ -80,3 +80,24 @@ config ESPI_DEBUG help This option enables eSPI library helper functions for displaying debug information. + +config NO_CBFS_MCACHE + bool + default y + help + Disables the CBFS metadata cache. This means that your platform does + not need to provide a CBFS_MCACHE section in memlayout and can save + the associated CAR/SRAM size. In that case every single CBFS file + lookup must re-read the same CBFS directory entries from flash to find + the respective file. + +config CBFS_MCACHE_RW_PERCENTAGE + int + depends on VBOOT && !NO_CBFS_MCACHE + default 25 if CHROMEOS # Chrome OS stores many L10n files in RO only + default 50 + help + The amount of the CBFS_MCACHE area that's used for the RW CBFS, in + percent from 0 to 100. The remaining area will be used for the RO + CBFS. Default is an even 50/50 split. When VBOOT is disabled, this + will automatically be 0 (meaning the whole MCACHE is used for RO). |