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| author | Vadim Bendebury <vbendeb@chromium.org> | 2011-09-21 16:12:39 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-03-28 20:43:59 +0200 |
| commit | 6f72d6965c7c54df663f2337e6154daf4dd464ff (patch) | |
| tree | 697703760f9df528f9f30b98dc8fbe67d1766809 /src/lib/Makefile.inc | |
| parent | 9202473d076c02270dfa3e3a9b275d20455c143d (diff) | |
| download | coreboot-6f72d6965c7c54df663f2337e6154daf4dd464ff.tar.gz coreboot-6f72d6965c7c54df663f2337e6154daf4dd464ff.tar.bz2 coreboot-6f72d6965c7c54df663f2337e6154daf4dd464ff.zip | |
Add timestamp collecting to coreboot.
This patch adds code to initialize the time stamp collection
facility in coreboot. It adds a table in the CBMEM section, which
provides the base timer reading value (all other readings are
offsets of this one) and an array of timestamp id/timestamp value
pairs.
Just two values are being added now, this will have to be used
more extensively and also integrated into payloads to provide more
comprehensive boot process time measurements.
Also, since the CBMEM area could already contain a section (from the
previous run, before reset), when processing a section addition
request we should check if a section already exists and return its
address, if so.
Change-Id: I7ed9f5c400bc5432f228348b41fd19a67c36d533
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/713
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/lib/Makefile.inc')
| -rw-r--r-- | src/lib/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index e0e5e7506069..db640dc0059b 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -14,6 +14,7 @@ romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c romstage-$(CONFIG_CONSOLE_NE2K) += compute_ip_checksum.c romstage-$(CONFIG_USBDEBUG) += usbdebug.c +romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c ramstage-y += memset.c ramstage-y += memchr.c @@ -36,6 +37,7 @@ ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c ramstage-$(CONFIG_USBDEBUG) += usbdebug.c ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c ramstage-$(CONFIG_TRACE) += trace.c +ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c driver-$(CONFIG_CONSOLE_NE2K) += ne2k.c |