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| author | Nick Vaccaro <nvaccaro@google.com> | 2020-09-16 17:08:00 -0700 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2020-10-09 07:34:50 +0000 |
| commit | 88d4e82b33e5b47cc5b19d5f516272ff03a41546 (patch) | |
| tree | 8bd5004380a8f5e8ed45536dbfb2a1450214a346 /src/lib/spd_bin.c | |
| parent | 93d483db89da3554afe01958e9f80a76251f2477 (diff) | |
| download | coreboot-88d4e82b33e5b47cc5b19d5f516272ff03a41546.tar.gz coreboot-88d4e82b33e5b47cc5b19d5f516272ff03a41546.tar.bz2 coreboot-88d4e82b33e5b47cc5b19d5f516272ff03a41546.zip | |
lib/spd: respect spd memory part name override
The BIOS log was looking in the spd data for the part name, but part
names are stripped from generic SPDs. For these cases, a mainboard
can override the dram part number string, so the spd logging code
needs to check for an override string when logging the dram part
number.
Change print_spd_info() to use an override string if declared.
BUG=b:168724473
TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot
volteer2 and verify that the BIOS log shows a part name when
logging SPD information:
SPD: module part number is K4U6E3S4AA-MGCL
I also modified volteer to not override the part name and verified
that this change did as expected and printed a blank string.
Change-Id: I91971e07c450492dbb0588abd1c3c692ee0d3bb0
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45459
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/lib/spd_bin.c')
| -rw-r--r-- | src/lib/spd_bin.c | 35 |
1 files changed, 21 insertions, 14 deletions
diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c index 412597321533..38edc5f151be 100644 --- a/src/lib/spd_bin.c +++ b/src/lib/spd_bin.c @@ -143,34 +143,41 @@ static int spd_get_busw(const uint8_t spd[], int dram_type) return spd_busw[index]; } -static void spd_get_name(const uint8_t spd[], char spd_name[], int dram_type) +static void spd_get_name(const uint8_t spd[], int type, const char **spd_name, size_t *len) { - switch (dram_type) { + *spd_name = mainboard_get_dram_part_num(); + if (*spd_name != NULL) { + *len = strlen(*spd_name); + return; + } + + switch (type) { case SPD_DRAM_DDR3: - memcpy(spd_name, &spd[DDR3_SPD_PART_OFF], DDR3_SPD_PART_LEN); - spd_name[DDR3_SPD_PART_LEN] = 0; + *spd_name = (const char *) &spd[DDR3_SPD_PART_OFF]; + *len = DDR3_SPD_PART_LEN; break; case SPD_DRAM_LPDDR3_INTEL: - memcpy(spd_name, &spd[LPDDR3_SPD_PART_OFF], - LPDDR3_SPD_PART_LEN); - spd_name[LPDDR3_SPD_PART_LEN] = 0; + *spd_name = (const char *) &spd[LPDDR3_SPD_PART_OFF]; + *len = LPDDR3_SPD_PART_LEN; break; - /* LPDDR3, LPDDR4 and DDR4 have the same part number offset */ + /* LPDDR3, LPDDR4 and DDR4 have same part number offset and length */ case SPD_DRAM_LPDDR3_JEDEC: case SPD_DRAM_DDR4: case SPD_DRAM_LPDDR4: case SPD_DRAM_LPDDR4X: - memcpy(spd_name, &spd[DDR4_SPD_PART_OFF], DDR4_SPD_PART_LEN); - spd_name[DDR4_SPD_PART_LEN] = 0; + *spd_name = (const char *) &spd[DDR4_SPD_PART_OFF]; + *len = DDR4_SPD_PART_LEN; break; default: + *len = 0; break; } } void print_spd_info(uint8_t spd[]) { - char spd_name[DDR4_SPD_PART_LEN + 1] = { 0 }; + const char *nameptr = NULL; + size_t len; int type = spd[SPD_DRAM_TYPE]; int banks = spd_get_banks(spd, type); int capmb = spd_get_capmb(spd); @@ -184,9 +191,9 @@ void print_spd_info(uint8_t spd[]) printk(BIOS_INFO, "SPD: module type is %s\n", spd_get_module_type_string(type)); /* Module Part Number */ - spd_get_name(spd, spd_name, type); - - printk(BIOS_INFO, "SPD: module part number is %s\n", spd_name); + spd_get_name(spd, type, &nameptr, &len); + if (nameptr) + printk(BIOS_INFO, "SPD: module part number is %.*s\n", (int) len, nameptr); printk(BIOS_INFO, "SPD: banks %d, ranks %d, rows %d, columns %d, density %d Mb\n", |