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authorMatthew Garrett <mjg59@google.com>2018-07-24 14:06:39 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-03-16 14:42:04 +0000
commit2f62a352ea3f62e58c166c430d37ec2d2565eeca (patch)
treec62c7379e7efb5a605dc2e73a4bde0486950143a /src/mainboard/51nb/x210/acpi/platform.asl
parent2677e2dbf6a2733de6a7d6c4ff0975d8a2650e13 (diff)
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mb/51nb: Add support for the 51nb X210
The 51nb X210 is a replacement motherboard for Thinkpad X200/X201 systems, based on a modern Kabylake CPU. It also ships with no firmware protection, (IFD is fully unlocked, no protected regions are set, no Bootguard), making it an ideal coreboot target. This port is based on the support for the Skylake-based Purism Librem 13v3, with the following significant changes: * EC firmware is contained within the system SPI flash, and so a blob of EC firmware must be injected to a defined location during image build. * GPIO layout is different - this is currently just a raw import of the GPIO configuration from the vendor firmware * The system has two DIMMs, so an additional SPD address has been added * The USB port layout is different * The EC must be enabled at boot time through SuperIO-style logical device configuration * EC register layout is different, necessitating changes in the ACPI tables * The HDA pins are different * The genx_dec config is different All hardware appears to work as expected, although the SD reader is untested. Signed-off-by: Matthew Garrett <mjg59@google.com> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Change-Id: If74621e76d703f629b54f1feb1acfc95cc72d183 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32531 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/51nb/x210/acpi/platform.asl')
-rw-r--r--src/mainboard/51nb/x210/acpi/platform.asl37
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/51nb/x210/acpi/platform.asl b/src/mainboard/51nb/x210/acpi/platform.asl
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* This file is part of the coreboot project. */
+
+/* Enable ACPI _SWS methods */
+#include <soc/intel/common/acpi/acpi_wake_source.asl>
+
+/*
+ * The _PIC method is called by the OS to choose between interrupt
+ * routing via the i8259 interrupt controller or the APIC.
+ *
+ * _PIC is called with a parameter of 0 for i8259 configuration and
+ * with a parameter of 1 for Local Apic/IOAPIC configuration.
+ */
+
+Method (_PIC, 1)
+{
+ /* Remember the OS' IRQ routing choice. */
+ Store (Arg0, PICM)
+}
+
+/*
+ * The _PTS method (Prepare To Sleep) is called before the OS is
+ * entering a sleep state. The sleep state number is passed in Arg0
+ */
+
+Method (_PTS, 1)
+{
+}
+
+/* The _WAK method is called on system wakeup */
+
+Method (_WAK, 1)
+{
+ Store(\_SB.PCI0.LPCB.EC.LIDC, \LIDS)
+ Store(\_SB.PCI0.LPCB.EC.ACIN, \PWRS)
+ Return (Package (){ 0, 0 })
+}