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| author | Aamir Bohra <aamirbohra@gmail.com> | 2021-04-07 14:31:31 +0530 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-08-04 15:15:48 +0000 |
| commit | 1b9ae1872635eb935b0f68a1a444cce550247339 (patch) | |
| tree | ff0185f9d63d1a1534eaf9d39ad0ff5d5565a7f0 /src/mainboard/amd/bilby | |
| parent | 12441dce064add85279b17ce5a7115a85297ca7d (diff) | |
| download | coreboot-1b9ae1872635eb935b0f68a1a444cce550247339.tar.gz coreboot-1b9ae1872635eb935b0f68a1a444cce550247339.tar.bz2 coreboot-1b9ae1872635eb935b0f68a1a444cce550247339.zip | |
mb/amd/bilby: Enable DP2 and DP3 enumeration
DP2 and DP2 is muxed with USBC port. This implementation
configures mux for DP functioanlity.
TEST=Verify display over DP2 and DP3.
Signed-off-by: Aamir Bohra <aamirbohra@gmail.com>
Change-Id: If0c8dfbb47175789bb27d4506c1e8b45c425c76a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56755
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ritul guru <ritul.bits@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/amd/bilby')
| -rw-r--r-- | src/mainboard/amd/bilby/devicetree.cb | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/amd/bilby/devicetree.cb b/src/mainboard/amd/bilby/devicetree.cb index 862d20f79cec..2d55a449ae81 100644 --- a/src/mainboard/amd/bilby/devicetree.cb +++ b/src/mainboard/amd/bilby/devicetree.cb @@ -92,6 +92,15 @@ chip soc/amd/picasso .tx_res_tune = 0x01, }" + register "usb_pd_config_override[0]" = "{ + .rfmux_override_en = 1, + .rfmux_config = USB_PD_RFMUX_DP_X4_MODE, + }" + register "usb_pd_config_override[1]" = "{ + .rfmux_override_en = 1, + .rfmux_config = USB_PD_RFMUX_DP_X4_MODE, + }" + # USB OC pin mapping; all ports share one OC pin register "usb_port_overcurrent_pin[0]" = "USB_OC_PIN_0" register "usb_port_overcurrent_pin[1]" = "USB_OC_PIN_0" |