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| author | Marc Jones <marcj303@gmail.com> | 2017-05-05 16:15:31 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-26 00:46:30 +0000 |
| commit | 2df118cdf04c72156ca92b940063288968ca7cea (patch) | |
| tree | fe3ed54c1cc3fffc69ca07f52bfbafd2a67f5fe4 /src/mainboard/amd/gardenia/devicetree.cb | |
| parent | 1587dc8a2b4ddfe110cd0239c6506a320cccac96 (diff) | |
| download | coreboot-2df118cdf04c72156ca92b940063288968ca7cea.tar.gz coreboot-2df118cdf04c72156ca92b940063288968ca7cea.tar.bz2 coreboot-2df118cdf04c72156ca92b940063288968ca7cea.zip | |
amd/gardenia: Switch to soc/amd/stoneyridge
Switch Garnenia mainboard to single soc/ directory structure.
Change-Id: I095804d603bcccf324d3244965081a9dccba62ae
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/amd/gardenia/devicetree.cb')
| -rw-r--r-- | src/mainboard/amd/gardenia/devicetree.cb | 86 |
1 files changed, 38 insertions, 48 deletions
diff --git a/src/mainboard/amd/gardenia/devicetree.cb b/src/mainboard/amd/gardenia/devicetree.cb index be070d067dc2..bb672b29e69d 100644 --- a/src/mainboard/amd/gardenia/devicetree.cb +++ b/src/mainboard/amd/gardenia/devicetree.cb @@ -1,7 +1,7 @@ # # This file is part of the coreboot project. # -# Copyright (C) 2015-2016 Advanced Micro Devices, Inc. +# Copyright (C) 2015-2017 Advanced Micro Devices, Inc. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -12,55 +12,45 @@ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # -chip northbridge/amd/pi/00670F00/root_complex +chip soc/amd/stoneyridge + + register "spdAddrLookup" = " + { + { {0xA2, 0x00} }, // socket 0 - Channel 0, slots 0 & 1 + }" + device cpu_cluster 0 on - chip cpu/amd/pi/00670F00 - device lapic 10 on end - end + device lapic 10 on end end - device domain 0 on subsystemid 0x1022 0x1410 inherit - chip northbridge/amd/pi/00670F00 # CPU side of HT root complex - - chip northbridge/amd/pi/00670F00 # PCI side of HT root complex - device pci 0.0 on end # Root Complex - device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 - device pci 1.1 on end # Internal Multimedia - device pci 2.0 on end # PCIe Host Bridge - device pci 2.1 on end # x4 PCIe slot - device pci 2.2 on end # M.2 slot - device pci 2.3 on end # M.2 slot - device pci 2.4 on end # x1 PCIe slot - device pci 2.5 on end # Cardreader - end #chip northbridge/amd/pi/00670F00 - - chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus - device pci 9.0 on end # PCIe Host Bridge - device pci 9.2 on end # HDA - device pci 10.0 on end # xHCI - device pci 11.0 on end # SATA - device pci 12.0 on end # EHCI - device pci 14.0 on # SM - chip drivers/generic/generic # dimm 0-0-0 - device i2c 51 on end - end - end # SM - device pci 14.3 on end # LPC 0x790e - device pci 14.7 on end # SD - end #chip southbridge/amd/pi/hudson - - device pci 18.0 on end - device pci 18.1 on end - device pci 18.2 on end - device pci 18.3 on end - device pci 18.4 on end - device pci 18.5 on end - register "spdAddrLookup" = " - { - { {0xA2, 0x00} }, // socket 0 - Channel 0, slots 0 & 1 - }" - - end #chip northbridge/amd/pi/00670F00 # CPU side of HT root complex + device pci 0.0 on end # Root Complex + device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 + device pci 1.1 on end # Internal Multimedia + device pci 2.0 on end # PCIe Host Bridge + device pci 2.1 on end # x4 PCIe slot + device pci 2.2 on end # M.2 slot + device pci 2.3 on end # M.2 slot + device pci 2.4 on end # x1 PCIe slot + device pci 2.5 on end # Cardreader + # devices on the NB/SB Link, but on the same pci bus + device pci 9.0 on end # PCIe Host Bridge + device pci 9.2 on end # HDA + device pci 10.0 on end # xHCI + device pci 11.0 on end # SATA + device pci 12.0 on end # EHCI + device pci 14.0 on # SM + chip drivers/generic/generic # dimm 0-0-0 + device i2c 51 on end + end + end # SM + device pci 14.3 on end # LPC 0x790e + device pci 14.7 on end # SD + device pci 18.0 on end + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + device pci 18.4 on end + device pci 18.5 on end end #domain -end #northbridge/amd/pi/00670F00/root_complex +end #chip soc/amd/stoneyridge |