diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-07 21:42:46 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-23 03:35:58 +0000 |
commit | 390ba044dcd650e37340f1ddee98bedf1096e76d (patch) | |
tree | 9836ee3819e8de8f0b5d67150fb19644e118cefe /src/mainboard/amd | |
parent | 14382453349f0ca1c11870ed10f8e7fd839851cc (diff) | |
download | coreboot-390ba044dcd650e37340f1ddee98bedf1096e76d.tar.gz coreboot-390ba044dcd650e37340f1ddee98bedf1096e76d.tar.bz2 coreboot-390ba044dcd650e37340f1ddee98bedf1096e76d.zip |
AGESA binaryPI: Consolidate and fix sleep states
SSFG was meant to be used as a mask to enable sleep states
_S1 thru _S4. However as a logical instead of bitwise 'and'
operation was used, all the states were enabled if only
one was marked available.
State _S3 is now set conditionally if HAVE_ACPI_RESUME=y.
For pi/hudson this had been fixed already preprocessor.
Note that all boards had SSFG == 0x0D that previously
enabled ACPI S3 sleep state even when it was not available.
States _S1 and _S2 still appear enabled in ASL/AML
but may not actually work.
TEST: 'cat /sys/power/state' and notice choice 'mem' was
removed from the list of available sleep states.
Change-Id: I27d616871c1771f0c87d8fba23d4ce1569607765
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/mainboard/amd')
24 files changed, 15 insertions, 79 deletions
diff --git a/src/mainboard/amd/bettong/acpi/mainboard.asl b/src/mainboard/amd/bettong/acpi/mainboard.asl index 508daa72342f..db5731f08870 100644 --- a/src/mainboard/amd/bettong/acpi/mainboard.asl +++ b/src/mainboard/amd/bettong/acpi/mainboard.asl @@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/bettong/dsdt.asl b/src/mainboard/amd/bettong/dsdt.asl index 2e6c96c567cf..37257c42ff22 100644 --- a/src/mainboard/amd/bettong/dsdt.asl +++ b/src/mainboard/amd/bettong/dsdt.asl @@ -38,7 +38,7 @@ DefinitionBlock ( #include <cpu/amd/pi/00660F01/acpi/cpu.asl> /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/pi/hudson/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl b/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl index 0141481d0650..68609d868e2e 100644 --- a/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl +++ b/src/mainboard/amd/db-ft3b-lc/acpi/mainboard.asl @@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/db-ft3b-lc/dsdt.asl b/src/mainboard/amd/db-ft3b-lc/dsdt.asl index 45ae428d9f86..03d46dcf7687 100644 --- a/src/mainboard/amd/db-ft3b-lc/dsdt.asl +++ b/src/mainboard/amd/db-ft3b-lc/dsdt.asl @@ -39,7 +39,7 @@ DefinitionBlock ( #include <cpu/amd/pi/00730F01/acpi/cpu.asl> /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/pi/hudson/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/dinar/dsdt.asl b/src/mainboard/amd/dinar/dsdt.asl index 8e51d3148d3d..773e5ba091a5 100644 --- a/src/mainboard/amd/dinar/dsdt.asl +++ b/src/mainboard/amd/dinar/dsdt.asl @@ -35,8 +35,6 @@ DefinitionBlock ( Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ - Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSV, Ones) /* Assume nothing */ Name(GPIC, 0x1) /* Assume PIC */ @@ -668,27 +666,8 @@ DefinitionBlock ( } } /* End Scope(_SB) */ - - /* Supported sleep states: */ - Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */ - - If (LAnd(SSFG, 0x01)) { - Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */ - } - If (LAnd(SSFG, 0x02)) { - Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */ - } - If (LAnd(SSFG, 0x04)) { - Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */ - } - If (LAnd(SSFG, 0x08)) { - Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */ - } - - Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */ - - Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */ - Name(CSMS, 0) /* Current System State */ + /* Contains the supported sleep states for this chipset */ + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Wake status package */ Name(WKST,Package(){Zero, Zero}) diff --git a/src/mainboard/amd/inagua/acpi/mainboard.asl b/src/mainboard/amd/inagua/acpi/mainboard.asl index b666a4f35091..702cb92032ed 100644 --- a/src/mainboard/amd/inagua/acpi/mainboard.asl +++ b/src/mainboard/amd/inagua/acpi/mainboard.asl @@ -23,8 +23,6 @@ Name(PBLN, 0x0) /* Length of BIOS area */ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/inagua/dsdt.asl b/src/mainboard/amd/inagua/dsdt.asl index 0cf657f23a23..7a6d2e192cbc 100644 --- a/src/mainboard/amd/inagua/dsdt.asl +++ b/src/mainboard/amd/inagua/dsdt.asl @@ -53,7 +53,7 @@ DefinitionBlock ( } /* End Scope(_SB) */ /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/lamar/acpi/mainboard.asl b/src/mainboard/amd/lamar/acpi/mainboard.asl index 015f8df5a578..d251657e0bae 100644 --- a/src/mainboard/amd/lamar/acpi/mainboard.asl +++ b/src/mainboard/amd/lamar/acpi/mainboard.asl @@ -24,8 +24,6 @@ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ - Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/lamar/dsdt.asl b/src/mainboard/amd/lamar/dsdt.asl index 1692fab90587..1f3f2916e40e 100644 --- a/src/mainboard/amd/lamar/dsdt.asl +++ b/src/mainboard/amd/lamar/dsdt.asl @@ -39,7 +39,7 @@ DefinitionBlock ( #include <cpu/amd/pi/00630F01/acpi/cpu.asl> /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/pi/hudson/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/olivehill/acpi/mainboard.asl b/src/mainboard/amd/olivehill/acpi/mainboard.asl index 0141481d0650..68609d868e2e 100644 --- a/src/mainboard/amd/olivehill/acpi/mainboard.asl +++ b/src/mainboard/amd/olivehill/acpi/mainboard.asl @@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/olivehill/dsdt.asl b/src/mainboard/amd/olivehill/dsdt.asl index b84f7986e505..e70998921c6b 100644 --- a/src/mainboard/amd/olivehill/dsdt.asl +++ b/src/mainboard/amd/olivehill/dsdt.asl @@ -39,7 +39,7 @@ DefinitionBlock ( #include <cpu/amd/agesa/family16kb/acpi/cpu.asl> /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/olivehillplus/acpi/mainboard.asl b/src/mainboard/amd/olivehillplus/acpi/mainboard.asl index 0141481d0650..68609d868e2e 100644 --- a/src/mainboard/amd/olivehillplus/acpi/mainboard.asl +++ b/src/mainboard/amd/olivehillplus/acpi/mainboard.asl @@ -22,8 +22,6 @@ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/olivehillplus/dsdt.asl b/src/mainboard/amd/olivehillplus/dsdt.asl index 45ae428d9f86..03d46dcf7687 100644 --- a/src/mainboard/amd/olivehillplus/dsdt.asl +++ b/src/mainboard/amd/olivehillplus/dsdt.asl @@ -39,7 +39,7 @@ DefinitionBlock ( #include <cpu/amd/pi/00730F01/acpi/cpu.asl> /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/pi/hudson/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/parmer/acpi/mainboard.asl b/src/mainboard/amd/parmer/acpi/mainboard.asl index d4b9e0a2db06..fb75289e5514 100644 --- a/src/mainboard/amd/parmer/acpi/mainboard.asl +++ b/src/mainboard/amd/parmer/acpi/mainboard.asl @@ -24,8 +24,6 @@ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ - Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/parmer/dsdt.asl b/src/mainboard/amd/parmer/dsdt.asl index a986ed50d2a0..01f9da1f3c7b 100644 --- a/src/mainboard/amd/parmer/dsdt.asl +++ b/src/mainboard/amd/parmer/dsdt.asl @@ -39,7 +39,7 @@ DefinitionBlock ( #include <cpu/amd/agesa/family15tn/acpi/cpu.asl> /* Describe the supported Sleep States for this Southbridge */ - #include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/persimmon/acpi/mainboard.asl b/src/mainboard/amd/persimmon/acpi/mainboard.asl index b666a4f35091..702cb92032ed 100644 --- a/src/mainboard/amd/persimmon/acpi/mainboard.asl +++ b/src/mainboard/amd/persimmon/acpi/mainboard.asl @@ -23,8 +23,6 @@ Name(PBLN, 0x0) /* Length of BIOS area */ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl index 0cf657f23a23..7a6d2e192cbc 100644 --- a/src/mainboard/amd/persimmon/dsdt.asl +++ b/src/mainboard/amd/persimmon/dsdt.asl @@ -53,7 +53,7 @@ DefinitionBlock ( } /* End Scope(_SB) */ /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/south_station/acpi/mainboard.asl b/src/mainboard/amd/south_station/acpi/mainboard.asl index b666a4f35091..702cb92032ed 100644 --- a/src/mainboard/amd/south_station/acpi/mainboard.asl +++ b/src/mainboard/amd/south_station/acpi/mainboard.asl @@ -23,8 +23,6 @@ Name(PBLN, 0x0) /* Length of BIOS area */ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/south_station/dsdt.asl b/src/mainboard/amd/south_station/dsdt.asl index 0cf657f23a23..7a6d2e192cbc 100644 --- a/src/mainboard/amd/south_station/dsdt.asl +++ b/src/mainboard/amd/south_station/dsdt.asl @@ -53,7 +53,7 @@ DefinitionBlock ( } /* End Scope(_SB) */ /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/thatcher/acpi/mainboard.asl b/src/mainboard/amd/thatcher/acpi/mainboard.asl index d4b9e0a2db06..fb75289e5514 100644 --- a/src/mainboard/amd/thatcher/acpi/mainboard.asl +++ b/src/mainboard/amd/thatcher/acpi/mainboard.asl @@ -24,8 +24,6 @@ Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ - Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/thatcher/dsdt.asl b/src/mainboard/amd/thatcher/dsdt.asl index a986ed50d2a0..01f9da1f3c7b 100644 --- a/src/mainboard/amd/thatcher/dsdt.asl +++ b/src/mainboard/amd/thatcher/dsdt.asl @@ -39,7 +39,7 @@ DefinitionBlock ( #include <cpu/amd/agesa/family15tn/acpi/cpu.asl> /* Describe the supported Sleep States for this Southbridge */ - #include <southbridge/amd/agesa/hudson/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Describe the Sleep Methods (WAK, PTS, GTS, etc.) for this platform */ #include "acpi/sleep.asl" diff --git a/src/mainboard/amd/torpedo/dsdt.asl b/src/mainboard/amd/torpedo/dsdt.asl index cc830dc9739a..6947cc263533 100644 --- a/src/mainboard/amd/torpedo/dsdt.asl +++ b/src/mainboard/amd/torpedo/dsdt.asl @@ -35,8 +35,6 @@ DefinitionBlock ( Name(PCBA, 0xE0000000) /* Base address of PCIe config space */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ - Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSV, Ones) /* Assume nothing */ Name(GPIC, 0x1) /* Assume PIC */ @@ -639,27 +637,8 @@ DefinitionBlock ( } } /* End Scope(_SB) */ - - /* Supported sleep states: */ - Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */ - - If (LAnd(SSFG, 0x01)) { - Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */ - } - If (LAnd(SSFG, 0x02)) { - Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */ - } - If (LAnd(SSFG, 0x04)) { - Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */ - } - If (LAnd(SSFG, 0x08)) { - Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */ - } - - Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */ - - Name(\_SB.CSPS ,0) /* Current Sleep State (S0, S1, S2, S3, S4, S5) */ - Name(CSMS, 0) /* Current System State */ + /* Contains the supported sleep states for this chipset */ + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Wake status package */ Name(WKST,Package(){Zero, Zero}) diff --git a/src/mainboard/amd/union_station/acpi/mainboard.asl b/src/mainboard/amd/union_station/acpi/mainboard.asl index b666a4f35091..702cb92032ed 100644 --- a/src/mainboard/amd/union_station/acpi/mainboard.asl +++ b/src/mainboard/amd/union_station/acpi/mainboard.asl @@ -23,8 +23,6 @@ Name(PBLN, 0x0) /* Length of BIOS area */ Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS) /* Base address of PCIe config space */ Name(HPBA, 0xFED00000) /* Base address of HPET table */ -Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ - /* Some global data */ Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ diff --git a/src/mainboard/amd/union_station/dsdt.asl b/src/mainboard/amd/union_station/dsdt.asl index 0cf657f23a23..7a6d2e192cbc 100644 --- a/src/mainboard/amd/union_station/dsdt.asl +++ b/src/mainboard/amd/union_station/dsdt.asl @@ -53,7 +53,7 @@ DefinitionBlock ( } /* End Scope(_SB) */ /* Contains the supported sleep states for this chipset */ - #include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl> + #include <southbridge/amd/common/acpi/sleepstates.asl> /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ #include "acpi/sleep.asl" |