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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-04 06:02:22 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-09 12:44:52 +0000 |
| commit | 993bc7098c8ac6b607211b2e9050df35679670dd (patch) | |
| tree | 75b7f9cb72253065eb034bcddfdd64295c34d2ba /src/mainboard/amd | |
| parent | 611a5f821d74f3bdddfb7d3954b4d7381a3f2788 (diff) | |
| download | coreboot-993bc7098c8ac6b607211b2e9050df35679670dd.tar.gz coreboot-993bc7098c8ac6b607211b2e9050df35679670dd.tar.bz2 coreboot-993bc7098c8ac6b607211b2e9050df35679670dd.zip | |
amdfam10 boards: Use smp_write_pci_intsrc()
Radically reduces line lengths and splits '(bus<<2) | INT'
to separate parameters.
Change-Id: I6c924a70d00a9139719f8078bbf1e4d04b576324
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30739
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/amd')
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah_fam10/mptable.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c index 1ab3ad2e6d87..0d4b344fe0f2 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c @@ -98,32 +98,32 @@ static void *smp_write_config_table(void *v) /* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ /* ??? What */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13); + smp_write_pci_intsrc(mc, mp_INT, m->bus_8111_0, sysconf.sbdn+1, 3, m->apicid_8111, 0x13); /* Onboard AMD USB */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0 << 2)|3, m->apicid_8111, 0x13); + smp_write_pci_intsrc(mc, mp_INT, m->bus_8111_1, 0, 3, m->apicid_8111, 0x13); /* Slot 3 PCI 32 */ for (i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5 << 2)|i, m->apicid_8111, 0x10 + (1+i)%4); /* 16 */ + smp_write_pci_intsrc(mc, mp_INT, m->bus_8111_1, 5, i, m->apicid_8111, 0x10 + (1+i)%4); /* 16 */ } /* Slot 4 PCI 32 */ for (i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (4 << 2)|i, m->apicid_8111, 0x10 + (0+i)%4); /* 16 */ + smp_write_pci_intsrc(mc, mp_INT, m->bus_8111_1, 4, i, m->apicid_8111, 0x10 + (0+i)%4); /* 16 */ } /* Slot 1 PCI-X 133/100/66 */ for (i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, (1 << 2)|i, m->apicid_8132_2, (0+i)%4); + smp_write_pci_intsrc(mc, mp_INT, m->bus_8132_2, 1, i, m->apicid_8132_2, (0+i)%4); } /* Slot 2 PCI-X 133/100/66 */ for (i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1 << 2)|i, m->apicid_8132_1, (1+i)%4); /* 25 */ + smp_write_pci_intsrc(mc, mp_INT, m->bus_8132_1, 1, i, m->apicid_8132_1, (1+i)%4); /* 25 */ } j = 0; @@ -145,7 +145,7 @@ static void *smp_write_config_table(void *v) for (jj = 0; jj < 4; jj++) { /* Slot 1 PCI-X 133/100/66 */ for (ii = 0; ii < 4; ii++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (jj << 2)|ii, m->apicid_8132a[j][0], (jj+ii)%4); + smp_write_pci_intsrc(mc, mp_INT, m->bus_8132a[j][1], jj, ii, m->apicid_8132a[j][0], (jj+ii)%4); } } } @@ -158,7 +158,7 @@ static void *smp_write_config_table(void *v) for (jj = 0; jj < 4; jj++) { /* Slot 2 PCI-X 133/100/66 */ for (ii = 0; ii < 4; ii++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (jj << 2)|ii, m->apicid_8132a[j][1], (jj+ii)%4); /* 25 */ + smp_write_pci_intsrc(mc, mp_INT, m->bus_8132a[j][2], jj, ii, m->apicid_8132a[j][1], (jj+ii)%4); /* 25 */ } } } @@ -168,7 +168,7 @@ static void *smp_write_config_table(void *v) case 2: /* Slot AGP */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151[j][1], 0x0, m->apicid_8111, 0x11); + smp_write_pci_intsrc(mc, mp_INT, m->bus_8151[j][1], 0x0, 0, m->apicid_8111, 0x11); break; } |