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authorArthur Heymans <arthur@aheymans.xyz>2021-08-11 13:42:40 +0200
committerMartin L Roth <gaumless@gmail.com>2022-11-30 15:19:06 +0000
commit691d58f9996d2ff3820b2c08646e98f16bbde2ee (patch)
tree043767ab2d786e0736961513a2b7d3012a5ef8ca /src/mainboard/apple/macbookair4_2/devicetree.cb
parent6cecb0d963dd8df9440487690c11a6da75d8b70f (diff)
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nb/intel/sandybridge: Add a chipset devicetree
This only moves CPU configuration to a common place. Other PCI devices can be done in follow-ups. Change-Id: I9c5b6f25b779e28b6719cf70455ff0f1a916ad87 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56912 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/apple/macbookair4_2/devicetree.cb')
-rw-r--r--src/mainboard/apple/macbookair4_2/devicetree.cb9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/apple/macbookair4_2/devicetree.cb b/src/mainboard/apple/macbookair4_2/devicetree.cb
index 6ea033ec32ec..df2f15471233 100644
--- a/src/mainboard/apple/macbookair4_2/devicetree.cb
+++ b/src/mainboard/apple/macbookair4_2/devicetree.cb
@@ -13,15 +13,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "500"
register "gpu_panel_power_up_delay" = "2000"
register "gpu_pch_backlight" = "0x13121312"
- device cpu_cluster 0 on
- chip cpu/intel/model_206ax
- register "acpi_c1" = "1"
- register "acpi_c2" = "3"
- register "acpi_c3" = "5"
- device lapic 0 on end
- device lapic 0xacac off end
- end
- end
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH