diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-09-13 21:17:25 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-09-25 13:58:33 +0000 |
| commit | ae7bd1eb23d878d22a2473bd61440377dff77df4 (patch) | |
| tree | a26c910b6255ac3d6ef88e08ae013e37868331f0 /src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl | |
| parent | 8165583ed9234364824c41b7b74153aba36b60ce (diff) | |
| download | coreboot-ae7bd1eb23d878d22a2473bd61440377dff77df4.tar.gz coreboot-ae7bd1eb23d878d22a2473bd61440377dff77df4.tar.bz2 coreboot-ae7bd1eb23d878d22a2473bd61440377dff77df4.zip | |
mb/asrock/g41m_vs3_r2: Add mainboard
The following was tested:
- CPUs with 800, 1067, 1333MHz FSB (1333MHz FSB needs a jumper set)
- The VGA output with libgfxinit
- USB
- COM1
- Ethernet
- SATA
- PCIe
- PCI
Has the following problems:
- The Ethernet NIC is not usable after S3 resume and requires Linux to reload
the driver. Vendor firmware also has this problem so it is quite likely it
is just a atl1c driver problem.
TODO: Add documentation
Change-Id: Ibce9ecdc0e44db3703401f116c9a8bff5b66437f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl')
| -rw-r--r-- | src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl b/src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl index bb8745ee9718..09d961d2b4b5 100644 --- a/src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl +++ b/src/mainboard/asrock/g41c-gs/acpi/ich7_pci_irqs.asl @@ -18,6 +18,44 @@ * IRQ routing for the 0:1e.0 PCI bridge of the ICH7 */ +#if IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_VS3_R2_0) +If (PICM) { + Return (Package() { + /* PCI1 SLOT 1 */ + Package() { 0x0000ffff, 0, 0, 0x11}, + Package() { 0x0000ffff, 1, 0, 0x12}, + Package() { 0x0000ffff, 2, 0, 0x13}, + Package() { 0x0000ffff, 3, 0, 0x10}, + + /* PCI1 SLOT 2 */ + Package() { 0x0002ffff, 0, 0, 0x17}, + Package() { 0x0002ffff, 1, 0, 0x14}, + Package() { 0x0002ffff, 2, 0, 0x15}, + Package() { 0x0002ffff, 3, 0, 0x16}, + + /* device not in lspci but in vendor DSDT */ + /* Package() { 0x0008ffff, 0, 0, 0x14}, */ + }) +} Else { + Return (Package() { + Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKB, 0}, + Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKC, 0}, + Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKD, 0}, + Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKA, 0}, + + Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKH, 0}, + Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKE, 0}, + Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKF, 0}, + Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKG, 0}, + + /* device not in lspci but in vendor DSDT */ + /* Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0}, */ + }) +} +#else +/* IS_ENABLED(CONFIG_BOARD_ASROCK_G41C_GS_R2_0) \ + || IS_ENABLED(CONFIG_BOARD_ASROCK_G41C_GS) \ + || IS_ENABLED(CONFIG_BOARD_ASROCK_G41M_GS) */ If (PICM) { Return (Package() { /* PCI1 SLOT 1 */ @@ -51,3 +89,4 @@ If (PICM) { /* Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0}, */ }) } +#endif |