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authorIdwer Vollering <vidwer@gmail.com>2020-01-05 01:44:25 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-09 16:03:07 +0000
commitc2ce370f30b60daf60e23182cf01eb898d35fbbd (patch)
tree7b4fc0f6682a74264c617a26010a8bb1be215a4c /src/mainboard/asus/am1i-a
parent7c0711092371a7e92c7b37d252ac4a74992dac87 (diff)
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src/mainboard: remove MMIO macros
This touches several mainboards. Replace the macro with C functions. The presence of bootblock.c is assumed. Change-Id: I583034ef0b0ed3e5a5e3dd680c57728ec5efbc8f Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/asus/am1i-a')
-rw-r--r--src/mainboard/asus/am1i-a/bootblock.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/asus/am1i-a/bootblock.c b/src/mainboard/asus/am1i-a/bootblock.c
index d4017cf28269..ddbf2aa5488e 100644
--- a/src/mainboard/asus/am1i-a/bootblock.c
+++ b/src/mainboard/asus/am1i-a/bootblock.c
@@ -113,18 +113,16 @@ static void ite_gpio_conf(pnp_devfn_t dev)
void bootblock_mainboard_early_init(void)
{
- volatile u32 i, val, *addr32;
+ volatile u32 i, val;
/* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
pm_write8(0xea, 0x1);
/* Configure ClkDrvStr1 settings */
- addr32 = (u32 *)0xfed80e24;
- *addr32 = 0x030800aa;
+ misc_write32(0x24, 0x030800aa);
/* Configure MiscClkCntl1 settings */
- addr32 = (u32 *)0xfed80e40;
- *addr32 = 0x000c4050;
+ misc_write32(0x40, 0x000c4050);
/* Configure SIO as made under vendor BIOS */
ite_gpio_conf(GPIO_DEV);