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authorKyösti Mälkki <kyosti.malkki@gmail.com>2022-11-11 19:46:05 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2022-11-17 07:42:55 +0000
commit2e19aa153a2eeea8f929e325649cb2f3edd7a5e6 (patch)
treef42dd8bf45e6018e57179aac7762b18aa0e5a493 /src/mainboard/emulation
parent20861b5ad3132f89a47bb07e711fb03d8d4ee254 (diff)
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mb/emulation/qemu-q35: Split smm_close() and smm_lock()
Change-Id: I6d8efe783e6cc5413c3fd0583574a075a2c3876b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/emulation')
-rw-r--r--src/mainboard/emulation/qemu-q35/cpu.c6
-rw-r--r--src/mainboard/emulation/qemu-q35/memmap.c30
2 files changed, 25 insertions, 11 deletions
diff --git a/src/mainboard/emulation/qemu-q35/cpu.c b/src/mainboard/emulation/qemu-q35/cpu.c
index 58b1fa5d7fee..c57ec500fe57 100644
--- a/src/mainboard/emulation/qemu-q35/cpu.c
+++ b/src/mainboard/emulation/qemu-q35/cpu.c
@@ -18,8 +18,7 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
- if (CONFIG(SMM_ASEG))
- smm_open_aseg();
+ smm_open();
/* FIXME: on X86_64 the save state size is smaller than the size of the SMM stub */
*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
@@ -77,6 +76,9 @@ static void relocation_handler(int cpu, uintptr_t curr_smbase,
static void post_mp_init(void)
{
+ /* Limit access to SMRAM to SMM module. */
+ smm_close();
+
/* Now that all APs have been relocated as well as the BSP let SMIs start flowing. */
global_smi_enable();
diff --git a/src/mainboard/emulation/qemu-q35/memmap.c b/src/mainboard/emulation/qemu-q35/memmap.c
index 34656134ffca..3f3ced23f835 100644
--- a/src/mainboard/emulation/qemu-q35/memmap.c
+++ b/src/mainboard/emulation/qemu-q35/memmap.c
@@ -78,6 +78,26 @@ void smm_region(uintptr_t *start, size_t *size)
printk(BIOS_SPEW, "SMM_BASE: 0x%08lx, SMM_SIZE: %zu MiB\n", *start, *size / MiB);
}
+void smm_open(void)
+{
+ /* Set D_OPEN */
+ if (CONFIG(SMM_ASEG))
+ pci_write_config8(HOST_BRIDGE, SMRAMC, D_OPEN | G_SMRAME | C_BASE_SEG);
+
+ if (CONFIG(SMM_TSEG))
+ pci_and_config8(HOST_BRIDGE, ESMRAMC, ~T_EN);
+}
+
+void smm_close(void)
+{
+ /* Clear D_OPEN */
+ if (CONFIG(SMM_ASEG))
+ pci_write_config8(HOST_BRIDGE, SMRAMC, G_SMRAME | C_BASE_SEG);
+
+ if (CONFIG(SMM_TSEG))
+ pci_or_config8(HOST_BRIDGE, ESMRAMC, T_EN);
+}
+
void smm_lock(void)
{
/*
@@ -87,13 +107,5 @@ void smm_lock(void)
*/
printk(BIOS_DEBUG, "Locking SMM.\n");
- if (CONFIG(SMM_TSEG))
- pci_or_config8(HOST_BRIDGE, ESMRAMC, T_EN);
-
- pci_write_config8(PCI_DEV(0, 0, 0), SMRAMC, D_LCK | G_SMRAME | C_BASE_SEG);
-}
-
-void smm_open_aseg(void)
-{
- pci_write_config8(PCI_DEV(0, 0, 0), SMRAMC, G_SMRAME | C_BASE_SEG | D_OPEN);
+ pci_write_config8(HOST_BRIDGE, SMRAMC, D_LCK | G_SMRAME | C_BASE_SEG);
}