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author | Wim Vervoorn <wvervoorn@eltan.com> | 2019-12-05 13:45:41 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-06 15:15:08 +0000 |
commit | 7c04acff8a58b7350fc669e2a0a71f3a308f8c09 (patch) | |
tree | c8c2f384f9a6b02e698ead2f2a78fb60a6cda48d /src/mainboard/facebook/monolith/acpi/dptf.asl | |
parent | cbc878d2a20549030deaecdecc37ff5b9dcb3272 (diff) | |
download | coreboot-7c04acff8a58b7350fc669e2a0a71f3a308f8c09.tar.gz coreboot-7c04acff8a58b7350fc669e2a0a71f3a308f8c09.tar.bz2 coreboot-7c04acff8a58b7350fc669e2a0a71f3a308f8c09.zip |
mb/facebook/monolith: Add Facebook Monolith
The board is booting Linux and has been briefly tested.
SeaBIOS, TianoCore payload and Linux as payload all seem to work fine.
BUG=N/A
TEST=tested on Facebook Monolith
Change-Id: I65a2e03334af65cfb3f825d43fa0daa6e6c75913
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/facebook/monolith/acpi/dptf.asl')
-rw-r--r-- | src/mainboard/facebook/monolith/acpi/dptf.asl | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/src/mainboard/facebook/monolith/acpi/dptf.asl b/src/mainboard/facebook/monolith/acpi/dptf.asl new file mode 100644 index 000000000000..5ea95b41d03d --- /dev/null +++ b/src/mainboard/facebook/monolith/acpi/dptf.asl @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2015 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define DPTF_CPU_PASSIVE 80 +#define DPTF_CPU_CRITICAL 90 +#define DPTF_CPU_ACTIVE_AC0 90 +#define DPTF_CPU_ACTIVE_AC1 80 +#define DPTF_CPU_ACTIVE_AC2 70 +#define DPTF_CPU_ACTIVE_AC3 60 +#define DPTF_CPU_ACTIVE_AC4 50 + +Name (DTRT, Package () { + /* CPU Throttle Effect on CPU */ + Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, + +}) + +Name (MPPC, Package () +{ + 0x2, /* Revision */ + Package () { /* Power Limit 1 */ + 0, /* PowerLimitIndex, 0 for Power Limit 1 */ + 1600, /* PowerLimitMinimum */ + 15000, /* PowerLimitMaximum */ + 1000, /* TimeWindowMinimum */ + 1000, /* TimeWindowMaximum */ + 200 /* StepSize */ + }, + Package () { /* Power Limit 2 */ + 1, /* PowerLimitIndex, 1 for Power Limit 2 */ + 8000, /* PowerLimitMinimum */ + 8000, /* PowerLimitMaximum */ + 1000, /* TimeWindowMinimum */ + 1000, /* TimeWindowMaximum */ + 1000 /* StepSize */ + } +}) + +/* Include DPTF */ +#include <soc/intel/skylake/acpi/dptf/dptf.asl> |