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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-04-23 01:43:38 +1000 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-04-26 13:06:15 +0200 |
| commit | 5c41ee69ef27575f93441f487b1d9f4c2d97f8e0 (patch) | |
| tree | add605b344233cf6e4c45fd799b86548ff832252 /src/mainboard/gigabyte/ga_2761gxdk | |
| parent | 03ad2a26b07909a5c34a1ade30f905ae3de5b8a0 (diff) | |
| download | coreboot-5c41ee69ef27575f93441f487b1d9f4c2d97f8e0.tar.gz coreboot-5c41ee69ef27575f93441f487b1d9f4c2d97f8e0.tar.bz2 coreboot-5c41ee69ef27575f93441f487b1d9f4c2d97f8e0.zip | |
superio/ite/it8716f: Rewrite from hardcoded base addr
Following the same reasoning as:
HASHHERE superio/ite/it8721f: Rewrite from hardcoded base addr
Removing hard coded magics and expose sio pnp api in romstage.
Change-Id: I27433cb1a84b3641a6110ecf6bd5021e00769aba
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5565
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/gigabyte/ga_2761gxdk')
| -rw-r--r-- | src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 4d215ae6959a..86158c8853aa 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -38,14 +38,14 @@ #include "lib/delay.c" #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" -#include "superio/ite/it8716f/early_serial.c" -#include "superio/ite/it8716f/early_init.c" +#include <superio/ite/it8716f/it8716f.h> #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/sis/sis966/early_ctrl.c" #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) +#define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO) static void memreset(int controllers, const struct mem_controller *ctrl) { } static void activate_spd_rom(const struct mem_controller *ctrl) { } @@ -125,10 +125,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); - pnp_enter_ext_func_mode(SERIAL_DEV); - pnp_write_config(SERIAL_DEV, 0x23, 0); - it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE); - pnp_exit_ext_func_mode(SERIAL_DEV); + it8716f_conf_clkin(CLKIN_DEV, IT8716F_UART_CLK_PREDIVIDE_48); + it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); setup_mb_resource_map(); |